A charge-steering amplifier circuit and a control method thereof are provided. The charge-steering amplifier circuit is used for amplifying a differential input signal and includes a sample-and-hold circuit, a charge-steering amplifier, a reference voltage generation circuit, and a switch circuit. The sample-and-hold circuit is configured to sample the differential input signal to generate first and second sampled signals. The charge-steering amplifier has a first input terminal, a second input terminal, a first output terminal, and a second output terminal. The first and second input terminals receive the first and second sampled signals, respectively. The reference voltage generation circuit is configured to generate a reference voltage according to the differential input signal. The switch circuit is configured to couple the reference voltage to the first output terminal and the second output terminal.

A surface plasmon-based photodetector includes: a silicon substrate; a grating in contact with a surface of the silicon substrate, in which the grating forms a Schottky diode with the semiconductor substrate; and a complementary-metal-oxide-semiconductor (CMOS) sample and hold stage as well as an analog-to-digital circuit (ADC) in the silicon substrate and arranged to detect electrical current generated at the Schottky diode.

A differential MEMS-readout circuit comprises a first input bonding pad, including a first contact pin and a second contact pin. The differential MEMS-readout circuit comprises a second input bonding pad, including a first contact pin and a second contact pin; and a differential-readout amplifier section comprising a first input connected to the first contact pin of the first input bonding pad and a second input connected to the first contact pin of the second bonding pad, wherein the differential-readout amplifier section comprises a first and a second transistor circuit and each of the second contact pins of the first and second input bonding pads is coupled to one of the first and the second transistor circuits or is coupled to one of the first and the second transistor circuits and/or to ground.

The present invention provides an amplifier circuit, wherein the amplifier circuit includes an input terminal, a capacitor, an amplifier, a feedback circuit and an aliasing tone cancellation circuit. The input terminal is configured to receive a first input signal. The capacitor is coupled to the input terminal. The amplifier is configured to receive the input signal through the capacitor to generate an output signal. The feedback circuit is coupled between an input node and an output node of the amplifier, and is configured to generate a feedback signal according to the output signal, wherein the feedback circuit includes a storage block including a switched-capacitor. The aliasing tone cancellation circuit is coupled between the input terminal of the amplifier circuit and the input node of the amplifier, and configured to generate a signal to cancel or reduce an aliasing tone of the feedback signal according to the input signal.

One or more examples relate to an apparatus to amplify differential voltage signal components of voltage across a resistor. Such an apparatus may include a resistor; a differential amplification circuit operatively coupled with the resistor to amplify a differential voltage signal component of a voltage across the resistor; and an operative coupling between the resistor and the differential amplification circuit to pass the differential voltage signal component and isolate a common mode voltage signal component of the voltage across the resistor.

A signal conversion circuit, a heart rate sensor, and an electronic device are provided, and the signal conversion circuit includes: a photoelectric conversion circuit, configured to convert an optical signal into a current signal; a differential signal conversion circuit, connected to the photoelectric conversion circuit, and configured to convert the current signal into a first differential signal and a second differential signal, where the first differential signal is an integration signal of the current signal in a first phase, and the second differential signal is an integration signal of the current signal in a second phase; and a subtraction amplifier, connected to the differential signal conversion circuit, and configured to amplify a difference value between the first differential signal and the second differential signal, to generate a third differential signal. The signal conversion circuit of embodiments of the present disclosure can effectively suppress ambient interference.

A circuit includes an amplifier having first and second inputs and an output, and a feedback circuit configured to generate a feedback voltage in response to a voltage at the output of the amplifier. The feedback circuit is coupled to the first input of the amplifier to provide the feedback voltage to the first input of the amplifier. An output circuit is configured to generate a variable bias current in response to the voltage at the output of the amplifier. A switch circuit is configured to switch the second input of the amplifier from receiving a first reference voltage during a first mode of operation to receiving a second reference voltage during a second mode of operation.

An amplifier includes: a signal polarity inversion circuit which modulates an input signal and outputs a modulation signal; an amplifier circuit which is constituted from an operational transconductance amplifier (OTA) to amplify the modulation signal and output a current; and a sample-hold circuit having a sampling capacitor which is charged and discharged by selective sampling of the output current of the amplifier circuit and a holding capacitor to which the voltage of the sampling capacitor is transferred.

A signal detection circuit is provided, and includes an input switch circuit, an amplitude detection circuit, a clock generating circuit, and an integration circuit. The input switch circuit receives a reference voltage and an input voltage and selectively outputs the reference voltage or the input voltage. The amplitude detection circuit detects an output of the input switch circuit to generate an amplitude voltage. The clock generating circuit controls the input switch circuit to alternately enter first and second phases, the input switch circuit is controlled to output the reference voltage in the first phase, and output the input voltage in the second phase. The integration circuit receives the amplitude voltage as an input, and generates an integration voltage corresponding to an accumulation result within a predetermined time interval. The predetermined time interval includes at least one period that cycles between the first phase and the second phase.

Sampling circuits and methods for sampling are provided. In a first operating phase, sampling capacitors are coupled to inputs, and in a second operating phase, to a common-mode signal.