Apparatus and methods for low noise amplifiers (LNAs) are provided herein. In certain configurations, an LNA includes a mode control circuit that operates the LNA in one of a plurality of modes including a gain mode and a bypass mode, a gain circuit electrically connected between an input terminal and an output terminal and operable to amplify a radio frequency signal received from the input terminal in the gain mode, and a bypass circuit electrically connected between the input terminal and the output terminal and operable to bypass the gain circuit in the bypass mode. The bypass circuit includes a balun that provides a first amount of compensation for a difference in phase delay between the bypass circuit and the gain circuit, and the LNA further includes a phase compensation circuit operable to provide a second amount of compensation for the difference in phase delay.

Apparatus and methods for low noise amplifiers (LNAs) are provided herein. In certain configurations, an LNA includes a mode control circuit that operates the LNA in one of a plurality of modes including a gain mode and a bypass mode, a gain circuit electrically connected between an input terminal and an output terminal and operable to amplify a radio frequency signal received from the input terminal in the gain mode, and a bypass circuit electrically connected between the input terminal and the output terminal and operable to bypass the gain circuit in the bypass mode. The bypass circuit includes a balun that provides a first amount of compensation for a difference in phase delay between the bypass circuit and the gain circuit, and the LNA further includes a phase compensation circuit operable to provide a second amount of compensation for the difference in phase delay.

A transconductance amplifier is provided with: a cross-coupled differential pair (31) having one set of differential pair transistors in which signals whose polarities are opposite to each other are inputted to gates thereof, drains of one of the differential pair transistors being connected to drains of another one of the differential pair transistors, and a control circuit (32) comprised of logical circuits, for outputting a binary signal to the common source of each of the differential pair transistors on the basis of an output-level control signal and a polarity control signal which are inputted thereto.

Apparatus and methods for low noise amplifiers (LNAs) are provided herein. In certain configurations, an LNA includes a gain stage and a bypass stage electrically connected in parallel with one another between an input and an output. The bypass stage and the gain stage are selectively activated based on a mode of the LNA. For example, the gain stage provides inverting amplification to an input signal received at the input in a gain mode. Additionally, the bypass stage provides a low gain path from the input to the output in a bypass mode. Additionally, the bypass stage includes a balun that provides inversion to the bypass stage such that a phase delay through the bypass stage is similar to a phase delay of the gain stage.

A transconductance amplifier is provided with: a cross-coupled differential pair (31) having one set of differential pair transistors in which signals whose polarities are opposite to each other are inputted to gates thereof, drains of one of the differential pair transistors being connected to drains of another one of the differential pair transistors, and a control circuit (32) comprised of logical circuits, for outputting a binary signal to the common source of each of the differential pair transistors on the basis of an output-level control signal and a polarity control signal which are inputted thereto.

Apparatus and methods for low noise amplifiers (LNAs) are provided herein. In certain configurations, an LNA includes a gain stage and a bypass stage electrically connected in parallel with one another between an input and an output. The bypass stage and the gain stage are selectively activated based on a mode of the LNA. For example, the gain stage provides inverting amplification to an input signal received at the input in a gain mode. Additionally, the bypass stage provides a low gain path from the input to the output in a bypass mode. Additionally, the bypass stage includes a balun that provides inversion to the bypass stage such that a phase delay through the bypass stage is similar to a phase delay of the gain stage.