Monolithic microwave integrated circuits (MMICs) tolerant to electrical overstress are provided. In certain embodiments, a MMIC includes a signal pad that receives a radio frequency (RF) signal, and an RF circuit coupled to the RF signal pad. The RF circuit includes a transistor layout, an input field-effect transistor (FET) implemented using a first portion of a plurality of gate fingers of the transistor layout, and an embedded protection device electrically connected between a gate and a source of the input FET and implemented using a second portion of the plurality of gate fingers. The MMIC is tolerant to electrical overstress events, such as field-induced charged-device model (FICDM) events.

A variable gain amplifier includes a first transconductor circuit coupled to a first input terminal, a first output terminal, and a second output terminal of the variable gain amplifier, the first transconductor circuit including: a plurality of positive coefficient transistors coupled to the first output terminal and configured to selectively conduct current in response to a first binary code, a plurality of negative coefficient transistors coupled to the second output terminal and configured to selectively conduct current in response to a second binary code, and a plurality of amplifying transistors, each having a gate electrode coupled to the first input terminal, a first electrode coupled to a ground reference, and a second electrode coupled to a pair of coefficient transistors including one of the plurality of positive coefficient transistors and one of the plurality of negative coefficient transistors.

A testing system includes: a signal generator arranged to generate a testing signal; a dividing circuit coupled to the signal generator for providing a plurality of input signals according to the testing signal; and a plurality of power-amplifier chips coupled to the dividing circuit for being tested by generating a plurality of output signals for a predetermined testing time according to the plurality of input signals respectively.

An improved transformer based switch for PALNA applications. The transformer based switch having an input single pole port and a circuit with at least one transformer and at least one switch configured to connect portions of the transformer to ground or to short the transformer. The primary side of the transformer being connected to the input port and the secondary side of the transformer being connected to an output port.

Microwave amplifiers tolerant to electrical overstress are provided. In certain embodiments, a monolithic microwave integrated circuit (MMIC) includes a signal pad that receives a radio frequency (RF) signal, a ground pad, a balun including a primary section that receives the RF signal and a secondary section that outputs a differential RF signal, an amplifier that amplifies the differential RF signal, and a plurality of decoupling elements, some of them electrically connected between the primary section and the ground pad, others electrically connected in the secondary section to a plurality of the amplifier's nodes, and operable to protect the amplifier from electrical overstress. Such electrical overstress events can include electrostatic discharge (ESD) events, such as field-induced charged-device model (FICDM) events, as well as other types of overstress conditions.

A digital isolator can include: an encoding circuit configured to receive an input digital signal, and to generate an encoded signal according to the input digital signal; an isolation element having a primary winding, a first secondary winding, and a second secondary winding; a differential circuit configured to receive first and second differential signals, and to generate a difference signal according to the first and second differential signals; and a decoding circuit coupled with the differential circuit, and being configured to receive the difference signal, and to generate a target digital signal after decoding.

An amplifier comprises a common emitter stage coupled to a first and a second input, a common base stage coupled to the common emitter stage and to a first and a second output, and a cancellation path coupled to the common emitter stage and the common base stage and to the first and second outputs. The cancellation path generates a first cancellation signal that is 180 degrees out of phase with a first leakage signal at the first output and a second cancellation signal that is 180 degrees out of phase with a second leakage signal at the second output. The cancellation path comprises a first cancellation transistor coupled to the common emitter stage and the common base stage and to the first output and a second cancellation transistor coupled to the common emitter stage and the common base stage and to the second output.

Techniques are disclosed implementing a tunable transformer with additional taps in at least one of the three coils. The tunable transformer enables the resonant frequency within RF transceiver matching networks to be adjusted without substantially impacting the output power at resonance. The tunability of the transformer is partially driven by the insertion of additional coils within the transformer, which are selectively switched and may be further coupled with a tunable capacitance. The tunability of the transformer is further driven via the use of at least one multi-tap transformer coil, which allows electronic components to be coupled to different coil taps to thereby facilitate an adjustable DC inductance. Doing so counteracts changes in mutual inductance between the non-switched coils, and facilitates the stabilization of output power with shifts in resonant frequency.

The disclosed technology includes device, systems, techniques, and methods for amplifying a complex modulated signal with a broadband power amplifier. A broadband power amplifier may include an input network connected a long an input signal path, a driver stage, an interstage matching network stage, a power amplification stage, and a broadband matching output network. The broadband matching output network may include two coupled transmission lines and a compensation line connected between the two coupled transmission lines. Further, the broadband matching output network may include a capacitor connected with a secondary winding and a capacitor connected to each of the primary windings. The disclosed technology further includes transmission systems incorporating the broadband power amplifier.

A bias circuit for a PA. A first transistor has its drain terminal and its gate terminal connected to a first circuit node and its source terminal connected to a first supply terminal, a first current source connected to the first circuit node, and a first resistor connected between the first and second circuit nodes. A second transistor receives a first component of a differential input signal to the PA at its gate terminal, has its drain terminal connected to the second circuit node and its source terminal connected to a second supply terminal, and a third transistor receives a second component of the differential input signal to the PA at its gate terminal, having its drain terminal connected to the second circuit node and its source terminal connected to a second supply terminal. The gates terminals of the second and the third transistors are biased by a first voltage.