A charge-steering amplifier circuit and a control method thereof are provided. The charge-steering amplifier circuit is used for amplifying a differential input signal and includes a sample-and-hold circuit, a charge-steering amplifier, a reference voltage generation circuit, and a switch circuit. The sample-and-hold circuit is configured to sample the differential input signal to generate first and second sampled signals. The charge-steering amplifier has a first input terminal, a second input terminal, a first output terminal, and a second output terminal. The first and second input terminals receive the first and second sampled signals, respectively. The reference voltage generation circuit is configured to generate a reference voltage according to the differential input signal. The switch circuit is configured to couple the reference voltage to the first output terminal and the second output terminal.

An amplifier circuit, which has a first output terminal and a second output terminal, includes a first charge-steering amplifier, a second charge-steering amplifier, a first switch, and a second switch. The first charge-steering amplifier includes a first input terminal, a second input terminal, a first capacitor, and a second capacitor, and is used for amplifying a first input signal in a first operation period. The second charge-steering amplifier includes a third input terminal, a fourth input terminal, the first capacitor, and the second capacitor, and is used for amplifying a second input signal in a second operation period. The first capacitor and the second capacitor charge during the first operation period and discharge during the second operation period.

An exemplary system and method is disclosed employing a floating inverter amplifier comprising an inverter-based circuit comprising an input configured to be switchable between a floating reservoir capacitor during a first phase of operation and to a device power source during a second phase of operation. In some embodiments, the floating inverter amplifier is further configured for current reuse and dynamic bias. In other embodiments, the floating inverter amplifier is further configured with a dynamic cascode mechanism that does not need any additional bias voltage. The dynamic cascode mechanism may be used in combination with 2-step fast-settling operation to provide high-gain and high-speed noise suppression operation.

The present disclosure discloses a switched capacitor amplifier apparatus for improving level-shifting. An amplifier includes input terminals and output terminals. Two capacitor circuits correspond to signal input terminals and signal output terminals and each includes a sampling capacitor circuit, a load capacitor and a level-shifting capacitor. The sampling capacitor circuit samples an input signal from one of the signal input terminals to one of the input terminals. An electrical charge neutralizing capacitor is coupled between the output terminals. The load capacitor and the level-shifting capacitor are charged according to an output from one of the output terminals in an estimation period. The level-shifting capacitor charges the load capacitor in a level-shifting period to generate an output signal at one of the signal output terminals. The electrical charge neutralizing capacitor receives and provides electrical charges from the output terminals to the level-shifting capacitor respectively in the estimation period and the level-shifting period.

An analog computing method includes the steps of: (a) generating a biasing current (IWi) using a constant gm bias circuit operating in the subthreshold region for ultra-low power consumption, wherein gm is generated by PMOS or NMOS transistors, the circuit including a switched capacitor resistor; and (b) multiplying the biasing current by an input voltage using a differential amplifier multiplication circuit to generate an analog voltage output (VOi). In one or more embodiments, the method is used in a vision application, where the biasing current represents a weight in a convolution filter and the input voltage represents a pixel voltage of an acquired image.

A pixel circuit includes a differential amplifier. The differential amplifier includes a non-inverting input terminal, an inverting input terminal, and an output terminal. The differential amplifier includes an input differential pair including first and second NMOS transistors, a current mirror pair including PMOS transistors, and a constant current source including a fifth NMOS transistor. A threshold voltage of each of the first and second NMOS transistors is higher than a threshold voltage of the fifth NMOS transistor. Further, the threshold voltage of each of the first and second NMOS transistors is higher than a threshold voltage of another NMOS transistor.

A preamplifier amplifies signals input to first and second input terminals. A first switching circuit receives first and second input signals and outputs those to the first and second input terminals. A switched capacitor circuit samples two signals amplified by the preamplifier. Differential signals sampled by the switched capacitor circuit are respectively input to third and fourth input terminals of an integration circuit, and the integration circuit outputs differential signals obtained by those input signals to first and second output terminals. A second switching circuit switches a connection relationship between the switched capacitor circuit and the integration circuit. Each time the cycle changes, the first and second switching circuits switch the connection relationships to cause the signals amplified by the preamplifier to be sampled by double correlation sampling.

An amplifying circuit according to an embodiment includes an input terminal, an output terminal, first and second operational amplifiers, first and second input impedance elements, first to third feedback impedance elements, and an adder. The first (second) operational amplifier includes an inversion input terminal connected to a first (third) node and an output terminal connected to a second (fourth) node. The first (second) input impedance element has one end connected to the input terminal and the other end connected to the first (third) node. The first (second) feedback impedance element has one end connected to the first (third) node and the other end connected to the second (fourth) node. The third feedback impedance element has one end connected to the first node and the other end connected to the fourth node. The adder adds output voltages of the first and second operational amplifiers.

A variable current trans-impedance amplifier (TIA) for an ultrasound device is described. The TIA may be coupled to an ultrasonic transducer to amplify an output signal of the ultrasonic transducer representing an ultrasound signal received by the ultrasonic transducer. During acquisition of the ultrasound signal by the ultrasonic transducer, one or more current sources in the TIA may be varied.

An exemplary system and method is disclosed employing a floating inverter amplifier comprising an inverter-based circuit comprising an input configured to be switchable between a floating reservoir capacitor during a first phase of operation and to a device power source during a second phase of operation. In some embodiments, the floating inverter amplifier is further configured for current reuse and dynamic bias. In other embodiments, the floating inverter amplifier is further configured with a dynamic cascode mechanism that does not need any additional bias voltage. The dynamic cascode mechanism may be used in combination with 2-step fast-settling operation to provide high-gain and high-speed noise suppression operation.