In described examples, an amplifier can be arranged to generate a first stage output signal in response to an input signal. The input signal can be coupled to control a first current coupled from a first current source through a common node to generate the first stage output signal. A replica circuit can be arranged to generate a replica load signal in response to the input signal and in response to current received from the common node. A current switch can be arranged to selectively couple a second current from a second current source to the common node in response to the replica load signal.

A differential amplifier circuit of the present invention includes a differential input circuit including first and second transistors, and amplifies a difference voltage between a first input voltage applied to a control terminal of the first transistor and a second input voltage applied to a control terminal of the second transistor. The differential input circuit a P-channel depletion type transistor having a gate connected to the control terminal of the first transistor and a source connected to the control terminal of the second transistor, and the P-channel depletion type transistor operates as a bias current source of the differential amplifier circuit.

An amplifier may include multiple transistors with two transistors having their gates tied together via a common connection. The amplifier may utilize a local common mode feedback resistor as part of the amplifier. The local common mode feedback resistor may be coupled between the common connection and respective terminals of two transistors of multiple transistors. The local common mode feedback resistor may include a group of resistors coupled in series. The local common mode feedback resistor may also include a metal oxide semiconductor (MOS) resistor coupled in parallel with one or more of the first group of resistors. In the local common mode feedback, the first MOS resistor provides different levels of resistance to different process corners to reduce overshoot when the amplifier is enabled.

A peak detector for a power amplifier is provided that includes a threshold voltage detector configured to pulse a detection current in response to an amplified output signal from the amplifier exceeding a peak threshold. A plurality of such peak detectors may be integrated with a corresponding plurality of power amplifiers in a transmitter. Should any peak detector assert an alarm signal or more than a threshold number of alarm signals during a given period, a controller reduces a gain for the plurality of power amplifiers.

An electronic circuit is provided. The electronic circuit includes a first current generating circuit configured to output a first operating current based on a first operating voltage; and an input circuit configured to: receive a first current corresponding to a first input voltage and a second current corresponding to a second input voltage, wherein the first current and the second current are based on the first operating current; receive a third current and a fourth current that are generated based on the first operating voltage; and generate a fifth current corresponding to the second input voltage based on a second operating current. The electronic circuit is configured to generate an output voltage that is associated with a difference between the first input voltage and the second input voltage based on the second current, the fourth current and the fifth current, and the fourth current corresponds to the third current.

A device is disclosed. The device includes an operational amplifier, an output circuit and a first feedback circuit. The operational amplifier includes an input terminal that is configured to receive a feedback signal. The output circuit is coupled to an output terminal of the operational amplifier and is configured to generate an output signal in response to an output of the operational amplifier. The first feedback circuit is coupled to the output circuit and is configured to couple at least one first ripple signal in the output signal to the input terminal of the operational amplifier that is configured to receive the feedback signal, for adjusting the output signal. A method also is disclosed herein.

A differential amplifier includes first and second MOS transistors of a first conductivity type which constitute a differential input circuit, a bias current source which supplies a bias current to the first and second MOS transistors, and a third MOS transistor of the first conductivity type provided between the bias current source and the first and second MOS transistors and constituted to limit a back-gate voltage of the first and second MOS transistors.

To provide a semiconductor device that makes it possible to reduce a cell circuit area and an increase in resolution. There is provided a semiconductor device including: a first region in which readout cells are arranged in an array form, the readout cells having one of input transistors included in a differential amplifier: and a second region in which reference cells are arranged in an array form, the reference cells having another input transistor included in the differential amplifier, the first region and the second region being separated from each other.

The present technology relates to a comparator that can easily modify operating point potential of the comparator, and an imaging device. A pixel signal output from a pixel, and, a reference signal with changeable voltage are input to a differential pair. A current mirror connected to the differential pair, and a voltage drop mechanism allowed to cause a predetermined voltage drop is connected between a transistor that configures the differential pair, and a transistor that configures the current mirror. A switch is connected in parallel to the voltage drop mechanism. The present technology can be applied, for example, to an image sensor that captures an image.

A Low Dropout Regulator (LDO) with Less Quiescent Current in the Dropout Region is described, including an error amplifier configured to compare a reference voltage to an LDO output voltage across a resistive divider, a current mirror configured to mirror a first output of the error amplifier to a first and second output of the current mirror, and a comparator configured to compare the LDO output voltage to a second output of the error amplifier, which has been compared to the second output of the current mirror, and configured to output a control voltage to the error amplifier, where a low quiescent current is maintained when an LDO input voltage is near or less than the LDO output voltage.