Patent classifications
H03G1/0029
Image signal transmission apparatus and signal output circuit applying bandwidth broadening mechanism thereof
The present invention discloses a signal output circuit applying bandwidth broadening mechanism for an image signal transmission apparatus that includes a first driving circuit and a second driving circuit. The first driving circuit includes a continuous time linear equalizer (CTLE) and is configured to receive a digital input signal to perform a high frequency enhancement thereon to increase a bandwidth of the digital input signal to generate a first output signal, in which a zero point and two poles of a frequency response of the first driving circuit are determined by circuit parameters thereof. The second driving circuit is configured to receive and amplify the first output signal to generate a second output signal for an image receiving apparatus.
Gain Reduction Techniques for Radio-frequency Amplifiers
An electronic device may include wireless circuitry with a processor, a transceiver, an antenna, and a front-end module coupled between the transceiver and the antenna. The front-end module may include one or more radio-frequency amplifiers for amplifying a radio-frequency signal. The radio-frequency amplifier may include input transistors cross-coupled with capacitance neutralization transistors and/or coupled to cascode transistors. One or more n-type gain adjustment transistors may be coupled to source terminals of the capacitance neutralization transistors. One or more p-type gain adjustment transistors may be coupled to source terminals of the cascode transistors. One or more processors in the electronic device can selectively activate one or more of the gain adjustment transistors to reduce the gain of the radio-frequency amplifier without degrading noise performance and without altering the in-band frequency response of the radio-frequency amplifier.
Measurement and calibration of mismatch in an isolation channel
A method for calibrating an isolator product includes receiving a calibration signal on a differential pair of nodes of a receiver signal path of a first integrated circuit die of the isolator product. The method includes generating a diagnostic signal having a level corresponding to an average amplitude of the calibration signal on the differential pair of nodes. The method includes configuring a programmable receiver signal path based on the diagnostic signal. Generating the diagnostic signal may include providing an analog signal based on a full-wave rectified version of the calibration signal on the differential pair of nodes. Generating the diagnostic signal may include converting the analog signal to a digital signal.
SEMICONDUCTOR INTEGRATED CIRCUIT, RECEPTION DEVICE, MEMORY SYSTEM, AND SEMICONDUCTOR STORAGE DEVICE
A semiconductor integrated circuit has a reception circuit configured to receive a strobe signal of which a logic is intermittently switched in synchronization with a data signal, an output circuit configured to extract a low frequency component including at least a DC component of the strobe signal received by the reception circuit and to output a first signal, and a comparison circuit configured to compare a signal level of the first signal with a threshold level. The reception circuit is configured to change a boost amount of a high frequency component different from the low frequency component of the strobe signal based on a comparison result obtained by the comparison circuit.
Amplifier, amplification circuit and phase shifter
Amplifiers, amplification circuits, and phase shifters, for example, for flexibly adjusting an output phase to thereby meet a requirement of a constant phase on a link in a communications field, are provided. In one aspect, an amplifier includes first, second, and third MOS transistors. The first MOS transistor includes a gate separately coupled to a signal input end and a bias voltage input end, a source coupled to a power supply, and a drain separately coupled to sources of the second and third MOS transistors. A drain of the third MOS transistor is coupled to a ground, and a drain of the second MOS transistor is coupled to a signal output end. The bias voltage input end is configured to receive a bias voltage to adjust a phase difference between an input signal at the signal input end and an output signal at the signal output end.
Signal amplifiers that switch between different amplifier architectures for a particular gain mode
Disclosed herein are signal amplifiers having a plurality of amplifier cores. Individual amplifier cores can be designed to enhance particular advantages while reducing other disadvantages. The signal amplifier can then switch between amplifier cores in a particular gain mode to achieve desired performance characteristics (e.g., improving noise figure or linearity). Examples of signal amplifiers disclosed herein include amplifier architectures with a low noise figure amplifier core that reduces the noise figure and a linearity boost amplifier core that increases linearity. The disclosed signal amplifiers can switch between a first active core and a second active core for a single or particular gain mode to achieve desired signal characteristics during different time periods.
Circuits, equalizers and related methods
A circuit is disclosed, in accordance with some embodiments. The circuit includes a transistor stage, a resistive element, a first tunable capacitive element and a second tunable capacitive element. The transistor stage includes a first input/output terminal and a second input/output terminal. The resistive element is connected to the transistor stage. The first tunable capacitive element is connected in parallel with the resistive element. The second tunable capacitive element is connected to the second input/output terminal of the transistor stage.
DC coupled amplifier having pre-driver and bias control
A dc coupled amplifier includes a pre-driver, and amplifier and a bias control circuit. The pre-driver is configured to receive one or more input signals and amplify the one or more input signals to create one or more pre-amplified signals. The amplifier has cascode configured transistors configured to receive and amplify the one or more pre-amplified signals to create one or more amplified signals, the amplifier further having an output driver termination element. The bias control circuit is connected between the pre-driver and the amplifier, the bias control circuit receiving at least one bias current from the output driver termination element of the amplifier, wherein the pre-driver, the amplifier and the bias control circuit are all formed on a same die.
Apparatus and methods for envelope tracking systems with automatic mode selection
Apparatus and methods for envelope tracking systems with automatic mode selection are provided herein. In certain configurations, a power amplifier system includes a power amplifier configured to provide amplification to a radio frequency signal and to receive power from a power amplifier supply voltage, and an envelope tracker including a signal bandwidth detection circuit configured to generate a detected bandwidth signal based on processing an envelope signal corresponding to an envelope of the radio frequency signal. The envelope tracker further includes a switch bank configured to receive a plurality of regulated voltages, a filter configured to filter an output of the switch bank to generate the power amplifier supply voltage, and a mode control circuit configured to control a filtering characteristic of the filter based on the detected bandwidth signal.
Variable gain control system and method for an amplifier
An amplifier circuit for a millimeter wave (mmW) communication system includes an amplifier coupled to a matching network, and a variable gain control circuit in the matching network, the variable gain control circuit having an adjustable gain control resistance, the adjustable gain control resistance having adjustable segments and a center node therebetween, the center node coupled to an alternating current (AC) ground.