Certain aspects of the present disclosure provide techniques for configuring sidelink slots without symbols for automatic gain control. One aspect provides a method for wireless communication by a user equipment, including receiving a first cyclic prefix of a first symbol within a slot at the user equipment. The method further includes configuring a first automatic gain control setting based on a received power in the first cyclic prefix of the first symbol, and receiving a data portion of the first symbol using the first automatic gain control setting.

A method of controlling a signal power of a received signal received by a wireless communication device, the method including: measuring the signal power of the received signal at a plurality of time points in response to a gain control signal; calculating a variance of the signal power of the received signal at at least some time points of the plurality of time points; and controlling the signal power of the received signal based on a gain level determined according to the variance of the signal power of the received signal.

In one embodiment, an apparatus includes: a low noise amplifier (LNA) to receive and amplify a radio frequency (RF) signal, the LNA having a first controllable gain; a mixer to downconvert the RF signal to a second frequency signal; a programmable gain amplifier (PGA) coupled to the mixer to amplify the second frequency signal, the PGA having a second controllable gain; a digitizer to digitize the second frequency signal to a digitized signal; a demodulator coupled to the digitizer to demodulate the digitized signal; an automatic gain control (AGC) circuit to control one or more of the first controllable gain and the second controllable gain; and an AGC settling circuit to cause the demodulator to begin operation in response to determining that the AGC circuit has settled.

A gain adjustment circuit is coupled with a transmitting device and a receiving device that are in proximity to each other. The gain adjustment circuit receives a baseband signal that is generated based on gain signals and a power associated with a reception of a data packet by the receiving device. The gain adjustment circuit further receives previous transmission information of the transmitting device. The gain adjustment circuit predicts a time of transmission of a control packet from the transmitting device and determines whether the time of transmission overlaps with a time period of reception of the data packet by the receiving device. The gain adjustment circuit further generates and provides gain signals to the receiving device such that a signal interference during the transmission of the control packet and the reception of the data packet is mitigated.

Techniques are provided for automatic gain control processing to reduce adverse effects associated with clipped samples resulting from conversion of analog signals to digital signals. A methodology according to an embodiment includes identifying a clipped sample of the digital signal, for example by comparison of the digitized sample values to a threshold value associated with a full scale value of the converter. The method also includes applying a window function to portions of the digital signal. The window function is configured to attenuate samples of the digital signal within a region centered on the identified clipped sample. A Hilbert finite impulse response (FIR) filter may be applied to the digital signal prior to applying the window function. Parameters of the window function are selected based on frequency response characteristics of the FIR filter and on signal to noise ratio requirements of an application that receives the windowed digital signal.

A hybrid automatic level control (ALC) system for controlling analog outputs. Within the ALC, a feedback loop passes from an analog circuit to a digital circuit and may provide the level of the analog output to the digital circuit. The digital circuit may use lookup tables to model the responses of analog devices but without associated errors and complications of the analog domain. Some examples of the modeled response include linear frequency responses of analog diodes and frequency responses of analog filters. Based on the received feedback and using the lookup tables modeling the responses, the digital circuit may drive a digital-to-analog converter interfacing the analog circuit to control the level of the analog output.

Techniques are provided for automatic gain control processing to reduce adverse effects associated with clipped samples resulting from conversion of analog signals to digital signals. A methodology according to an embodiment includes identifying a clipped sample of the digital signal, for example by comparison of the digitized sample values to a threshold value associated with a full scale value of the converter. The method also includes applying a window function to portions of the digital signal. The window function is configured to attenuate samples of the digital signal within a region centered on the identified clipped sample. A Hilbert finite impulse response (FIR) filter may be applied to the digital signal prior to applying the window function. Parameters of the window function are selected based on frequency response characteristics of the FIR filter and on signal to noise ratio requirements of an application that receives the windowed digital signal.

A gain adjustment circuit is coupled with a transmitting device and a receiving device that are in proximity to each other. The gain adjustment circuit receives a baseband signal that is generated based on gain signals and a power associated with a reception of a data packet by the receiving device. The gain adjustment circuit further receives previous transmission information of the transmitting device. The gain adjustment circuit predicts a time of transmission of a control packet from the transmitting device and determines whether the time of transmission overlaps with a time period of reception of the data packet by the receiving device. The gain adjustment circuit further generates and provides gain signals to the receiving device such that a signal interference during the transmission of the control packet and the reception of the data packet is mitigated.

An AGC circuit for a radio receiver includes a detector converting a high frequency signal into a baseband signal. To reduce generation of a DC offset, the AGC circuit includes: a variable gain amplifier having an amplifier circuit and a high-pass filter, the amplifier circuit amplifying the baseband signal with a variable gain and the high-pass filter coupled to the amplifier circuit and having a cut-off frequency which is variable; a controller supplying a gain control signal; and a blocker temporarily blocking the high frequency signal. Using the block control signal, the controller causes the blocker to start blocking the high frequency signal, before the cut-off frequency of the high-pass filter is switched from high to low.

Disclosed herein is a DC offset cancellation circuit. The DC offset cancellation circuit includes a DC feedback unit configured to vary a DC feedback (DCFB) bandwidth to add at least one mid-bandwidth to the DCFB bandwidth and to provide a delay time in each case in order to reduce the DC droop error that occurs in switching from the high bandwidth (BW) to the mid-BW or from the mid-BW mode to the low BW mode, such that stable settling is ensured.