H03G2201/307

Wireless amplifier circuitry for carrier aggregation

An electronic device may include wireless circuitry with a baseband processor, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as a low noise amplifier for amplifying received radio-frequency signals. The low noise amplifier is operable in a non-carrier-aggregation (NCA) mode and a carrier aggregation (CA) mode. The low noise amplifier may include a first input stage, a second input stage, a complementary degeneration transformer, and an input impedance compensation circuit. During the NCA mode, the first input stage is turned on while the second input stage is turned off, the degeneration transformer is controlled to provide maximum inductance, and the compensation circuit is turned on to provide input matching. During the CA mode, the first and second input stages are turned on, the degeneration transformer is adjusted to provide less inductance, and the compensation circuit is turned off.

AUTOMATIC GAIN CONTROL
20230006627 · 2023-01-05 · ·

A method of operating a radio receiver device comprises receiving a plurality of signals with a plurality of corresponding frequencies; applying respective gains to each of the plurality of signals; and storing the gain applied to each signal and its corresponding frequency. The method comprises subsequently receiving a further signal with a further frequency; and applying a further gain to the further signal. The further gain is determined using at least one of the stored gains according to a difference between the further frequency and at least one of the plurality of corresponding frequencies.

Method and Apparatus to Optimize Power Clamping
20230238995 · 2023-07-27 ·

A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.

METHOD AND APPARATUS FOR ACHIEVING AND MAINTAINING BALANCE IN SOLID-STATE RF AND MICROWAVE POWER AMPLIFIERS
20230006620 · 2023-01-05 ·

This application is generally related to methods for improving performance in a system. One of the methods may include a step of determining whether absorbed power in a system meets a predetermined threshold. The absorbed power may be based upon first and second Walsh codes transmitted to each of first and second gain and phase modulators in the system. The first Walsh code may be orthogonal to the second Walsh code. A first set of the first and second Walsh codes may be inverted with respect to a second set of the first and second Walsh codes. The method may also include a step of modulating the absorbed power in view of the determination. The method may further include a step of transmitting feedback based upon the modulated power to the first and second gain and phase modulators.

Gain Reduction Techniques for Radio-frequency Amplifiers
20230231522 · 2023-07-20 ·

An electronic device may include wireless circuitry with a processor, a transceiver, an antenna, and a front-end module coupled between the transceiver and the antenna. The front-end module may include one or more radio-frequency amplifiers for amplifying a radio-frequency signal. The radio-frequency amplifier may include input transistors cross-coupled with capacitance neutralization transistors and/or coupled to cascode transistors. One or more n-type gain adjustment transistors may be coupled to source terminals of the capacitance neutralization transistors. One or more p-type gain adjustment transistors may be coupled to source terminals of the cascode transistors. One or more processors in the electronic device can selectively activate one or more of the gain adjustment transistors to reduce the gain of the radio-frequency amplifier without degrading noise performance and without altering the in-band frequency response of the radio-frequency amplifier.

Advanced gain shaping for envelope tracking power amplifiers

Envelope tracking power amplifiers with advanced gain shaping are provided. In certain implementations, a power amplifier system includes a power amplifier that amplifies a radio frequency (RF) signal and an envelope tracker that controls a voltage level of a supply voltage of the power amplifier based on an envelope of the RF signal. The power amplifier system further includes a gain shaping circuit that generates a gain shaping current that changes with the voltage level of the supply voltage from the envelope tracker. For example, the gain shaping circuit can include an analog look-up table (LUT) mapping a particular voltage level of the supply voltage to a particular current level of gain shaping current. Additionally, the gain shaping circuit biases the power amplifier based on the gain shaping current.

SYSTEMS AND METHODS FOR IMPROVING OUTPUT STABILITY OF A RADIO FREQUENCY POWER AMPLIFIER

Systems and methods for improving output stability of an RFPA. The systems may obtain an initial radio frequency signal to be amplified by the RFPA. The systems may also generate a compensated radio frequency signal by performing, based on a preset compensation rule and a set of compensation parameters, a gain compensation operation for the initial radio frequency signal. The set of compensation parameters may include a supply voltage of the RFPA and a transistor junction temperature of the RFPA. The systems may further generate, by performing a non-linear correction operation on the compensated radio frequency signal, a corrected radio frequency signal, which is transmitted to the RFPA.

Doherty radio frequency amplifier circuitry

Doherty radio frequency (RF) amplifier circuitry includes an input node, an output node, a main amplifier path, and a peaking amplifier path. The main amplifier path is coupled between the input node and the output node and includes a main amplifier. The peaking amplifier path is coupled in parallel with the main amplifier path between the input node and the output node, and includes a peaking amplifier and a peaking variable gain preamplifier between the input node and the peaking amplifier. The peaking variable gain preamplifier is configured to adjust a current provided to the peaking amplifier.

SIGNAL PROCESSING CIRCUIT
20230009665 · 2023-01-12 · ·

A signal processing circuit includes a signal path for outputting a first signal included in an input signal from a first output terminal to another signal processor; branch paths one of which extends from a top position located at a position on the signal path and the others which extend from associated branch positions that divide the signal path starting from the top position to the first output terminal into segments in each of which a first amount of delay obtained by equally dividing an amount of delay caused by the signal path and that is added to the first signal; a switch connected to each of the branch paths and switches whether to allow a second signal other than the first signal included in the input signal to pass through the connected branch paths; a variable gain amplifier connected to each of the switches and amplifies the second signal.

Receiver automatic gain control systems and methods
20220399866 · 2022-12-15 ·

An automatic gain control system for a receiver, including: an automatic gain control loop (40) adapted to be coupled to both a first transimpedance amplifier (12) coupled to a first analog-to-digital converter (14) forming a first tributary and a second transimpedance amplifier (12) coupled to a second analog-to-digital converter (14) forming a second tributary; and an offset gain control voltage to gain balance a transimpedance amplifier gain of the first tributary and a transimpedance amplifier gain of the second tributary. The automatic gain control loop can be analog. Also, the automatic gain control loop can be implemented in hardware or firmware.