Patent classifications
H03H11/18
DUAL-BAND IN-PHASE AND QUADRATURE-PHASE (I/Q) SIGNAL GENERATING APPARATUS AND POLYPHASE PHASE-SHIFTING APPARATUS USING THE SAME
A dual-band in-phase and quadrature-phase (I/Q) signal generating apparatus and a polyphase phase-shifting apparatus using the same are provided. An I/Q signal generating circuit may include a first resonant circuit that includes a first capacitor and a first inductor and that has one end connected to an input, and a second resonant circuit that includes a second capacitor and a second inductor and that has one end connected to another end of the first resonant circuit. The other end of the first resonant circuit and the one end of the second resonant circuit may be connected to a first output.
DUAL-BAND IN-PHASE AND QUADRATURE-PHASE (I/Q) SIGNAL GENERATING APPARATUS AND POLYPHASE PHASE-SHIFTING APPARATUS USING THE SAME
A dual-band in-phase and quadrature-phase (I/Q) signal generating apparatus and a polyphase phase-shifting apparatus using the same are provided. An I/Q signal generating circuit may include a first resonant circuit that includes a first capacitor and a first inductor and that has one end connected to an input, and a second resonant circuit that includes a second capacitor and a second inductor and that has one end connected to another end of the first resonant circuit. The other end of the first resonant circuit and the one end of the second resonant circuit may be connected to a first output.
Vector sum circuit and phase controller using the same
A vector sum circuit and a phase controller including the vector sum circuit are provided. The vector sum circuit includes an amplifier configured to amplify an input orthogonal signal by using a first metal oxide semiconductor field effect transistor (MOSFET), and a self body-biasing circuit comprising a resistor. The self body-biasing circuit is configured to connect a drain and a body of the first MOSFET to reduce a voltage connected to the body as a current at the drain increases.
VECTOR SUM CIRCUIT AND PHASE CONTROLLER USING THE SAME
A vector sum circuit and a phase controller including the vector sum circuit are provided. The vector sum circuit includes an amplifier configured to amplify an input orthogonal signal by using a first metal oxide semiconductor field effect transistor (MOSFET), and a self body-biasing circuit comprising a resistor. The self body-biasing circuit is configured to connect a drain and a body of the first MOSFET to reduce a voltage connected to the body as a current at the drain increases.
Control apparatus
A control apparatus includes, for at least two-phase signals detected from a resolver excited by a carrier signal having a carrier frequency fc, a first phase shifter that shifts a phase of a first phase signal of the resolver with a pole at a frequency f1 lower than the carrier frequency fc, a second phase shifter that shifts a phase of a second phase signal of the resolver with a pole at a frequency f2 higher than the carrier frequency fc, a signal generator that generates a correction signal for canceling out an error component of the carrier signal, and a synthesizer that synthesizes the phase-shifted first phase signal, the phase-shifted second signal, and the correction signal for canceling out the error component, in order to create a phase-modulated signal that is the carrier signal being modulated at a rotation angle of a rotor of the resolver.
Control apparatus
A control apparatus includes, for at least two-phase signals detected from a resolver excited by a carrier signal having a carrier frequency fc, a first phase shifter that shifts a phase of a first phase signal of the resolver with a pole at a frequency f1 lower than the carrier frequency fc, a second phase shifter that shifts a phase of a second phase signal of the resolver with a pole at a frequency f2 higher than the carrier frequency fc, a signal generator that generates a correction signal for canceling out an error component of the carrier signal, and a synthesizer that synthesizes the phase-shifted first phase signal, the phase-shifted second signal, and the correction signal for canceling out the error component, in order to create a phase-modulated signal that is the carrier signal being modulated at a rotation angle of a rotor of the resolver.
Ninety-degree phase shifter circuit and corresponding ninety-degree phase-shifting method
A phase shifter, which carries out a ninety-degree phase shift of a sinusoidal input signal having an input frequency, at the same input frequency, envisages: a continuous-time all-pass filter stage, which receives the sinusoidal input signal and generates an output signal phase-shifted by 90 at a phase-shift frequency that is a function of a RC time constant of the all-pass filter stage; and a calibration stage, which is coupled to the all-pass filter stage and generates a calibration signal for the all-pass filter stage, such that the phase-shift frequency is equal to the input frequency of the sinusoidal input signal, irrespective of variations of the value of the input frequency and/or of the RC time constant with respect to a nominal value.
Ninety-degree phase shifter circuit and corresponding ninety-degree phase-shifting method
A phase shifter, which carries out a ninety-degree phase shift of a sinusoidal input signal having an input frequency, at the same input frequency, envisages: a continuous-time all-pass filter stage, which receives the sinusoidal input signal and generates an output signal phase-shifted by 90 at a phase-shift frequency that is a function of a RC time constant of the all-pass filter stage; and a calibration stage, which is coupled to the all-pass filter stage and generates a calibration signal for the all-pass filter stage, such that the phase-shift frequency is equal to the input frequency of the sinusoidal input signal, irrespective of variations of the value of the input frequency and/or of the RC time constant with respect to a nominal value.
Phase shifter for linearly shifting phase of input signal based on phase control signals
Disclosed is a phase shift circuit including an input circuit for generating first to fourth internal signals based on an in-phase signal, a complementary in-phase signal, a quadrature phase signal, and a complementary quadrature phase signal and a switching circuit for outputting first to fourth shift signals based on the first to fourth internal signals. The input circuit includes a first transistor connected between a ground node and a first node to operate based on the in-phase signal and the first bias signal, a second transistor connected between the ground node and a second node to operate based on the complementary in-phase signal and the first bias signal, a third transistor connected between the ground node and the first node to operate based on the second bias signal, and a fourth transistor connected between the ground node and the second node to operate based on the second bias signal.
Phase shifter for linearly shifting phase of input signal based on phase control signals
Disclosed is a phase shift circuit including an input circuit for generating first to fourth internal signals based on an in-phase signal, a complementary in-phase signal, a quadrature phase signal, and a complementary quadrature phase signal and a switching circuit for outputting first to fourth shift signals based on the first to fourth internal signals. The input circuit includes a first transistor connected between a ground node and a first node to operate based on the in-phase signal and the first bias signal, a second transistor connected between the ground node and a second node to operate based on the complementary in-phase signal and the first bias signal, a third transistor connected between the ground node and the first node to operate based on the second bias signal, and a fourth transistor connected between the ground node and the second node to operate based on the second bias signal.