A control apparatus includes, for at least two-phase signals detected from a resolver excited by a carrier signal having a carrier frequency fc, a first phase shifter that shifts a phase of a first phase signal of the resolver with a pole at a frequency f1 lower than the carrier frequency fc, a second phase shifter that shifts a phase of a second phase signal of the resolver with a pole at a frequency f2 higher than the carrier frequency fc, a signal generator that generates a correction signal for canceling out an error component of the carrier signal, and a synthesizer that synthesizes the phase-shifted first phase signal, the phase-shifted second signal, and the correction signal for canceling out the error component, in order to create a phase-modulated signal that is the carrier signal being modulated at a rotation angle of a rotor of the resolver.

A control apparatus includes, for at least two-phase signals detected from a resolver excited by a carrier signal having a carrier frequency fc, a first phase shifter that shifts a phase of a first phase signal of the resolver with a pole at a frequency f1 lower than the carrier frequency fc, a second phase shifter that shifts a phase of a second phase signal of the resolver with a pole at a frequency f2 higher than the carrier frequency fc, a signal generator that generates a correction signal for canceling out an error component of the carrier signal, and a synthesizer that synthesizes the phase-shifted first phase signal, the phase-shifted second signal, and the correction signal for canceling out the error component, in order to create a phase-modulated signal that is the carrier signal being modulated at a rotation angle of a rotor of the resolver.

A phase shifter unit cell or a connected set of such cells that can be well isolated from external circuitry and which do not introduce insertion loss into an RF signal path, exhibit good return loss, and further provides additional advantages when combined with bracketing attenuator circuits. More particularly, embodiments integrate a high-isolation function within a phase shifter circuit by breaking the complimentary nature of the control signals to a phase shifter cell to provide greater control of switch states internal to the phase shifter cell and thus enable a distinct high-isolation state, and by including a switchable shunt termination resistor for use in the high-isolation state. Some embodiments are serially coupled to attenuator circuits to enable synergistic interaction that reduces overall die size and/or increases isolation. One such embodiment positions a high-isolation phase shifter cell in accordance with the present invention between bracketing programmable attenuators.

Disclosed is a phase shift circuit including an input circuit for generating first to fourth internal signals based on an in-phase signal, a complementary in-phase signal, a quadrature phase signal, and a complementary quadrature phase signal and a switching circuit for outputting first to fourth shift signals based on the first to fourth internal signals. The input circuit includes a first transistor connected between a ground node and a first node to operate based on the in-phase signal and the first bias signal, a second transistor connected between the ground node and a second node to operate based on the complementary in-phase signal and the first bias signal, a third transistor connected between the ground node and the first node to operate based on the second bias signal, and a fourth transistor connected between the ground node and the second node to operate based on the second bias signal.

Disclosed is a phase shift circuit including an input circuit for generating first to fourth internal signals based on an in-phase signal, a complementary in-phase signal, a quadrature phase signal, and a complementary quadrature phase signal and a switching circuit for outputting first to fourth shift signals based on the first to fourth internal signals. The input circuit includes a first transistor connected between a ground node and a first node to operate based on the in-phase signal and the first bias signal, a second transistor connected between the ground node and a second node to operate based on the complementary in-phase signal and the first bias signal, a third transistor connected between the ground node and the first node to operate based on the second bias signal, and a fourth transistor connected between the ground node and the second node to operate based on the second bias signal.

Various embodiments of the invention relate to high linearity RF circuits that may operate or function consistently under various levels of voltage, current or power. Embodiments of a diode module comprising cascaded diodes and connecting bias branches are disclosed for improved linearity of RF circuits. The diode module may comprise multiple diodes reversely coupled in series. Additionally, the diode module further comprises connecting bias branches coupled in parallel with diode pairs. Such configuration of reversely cascaded diodes coupled with alternatively connecting bias branches increases the robustness of the diode module to handle high input voltage or power from the RF path, thus provides enhanced linearity for the RF circuit as compared to single diode configuration.

Various embodiments of the invention relate to high linearity RF circuits that may operate or function consistently under various levels of voltage, current or power. Embodiments of a diode module comprising cascaded diodes and connecting bias branches are disclosed for improved linearity of RF circuits. The diode module may comprise multiple diodes reversely coupled in series. Additionally, the diode module further comprises connecting bias branches coupled in parallel with diode pairs. Such configuration of reversely cascaded diodes coupled with alternatively connecting bias branches increases the robustness of the diode module to handle high input voltage or power from the RF path, thus provides enhanced linearity for the RF circuit as compared to single diode configuration.

Various embodiments of the invention relate to high linearity RF circuits that may operate or function consistently under various levels of voltage, current or power. Embodiments of a diode module comprising cascaded diodes and connecting bias branches are disclosed for improved linearity of RF circuits. The diode module may comprise multiple diodes reversely coupled in series. Additionally, the diode module further comprises connecting bias branches coupled in parallel with diode pairs. Such configuration of reversely cascaded diodes coupled with alternatively connecting bias branches increases the robustness of the diode module to handle high input voltage or power from the RF path, thus provides enhanced linearity for the RF circuit as compared to single diode configuration.

Various embodiments of the invention relate to high linearity RF circuits that may operate or function consistently under various levels of voltage, current or power. Embodiments of a diode module comprising cascaded diodes and connecting bias branches are disclosed for improved linearity of RF circuits. The diode module may comprise multiple diodes reversely coupled in series. Additionally, the diode module further comprises connecting bias branches coupled in parallel with diode pairs. Such configuration of reversely cascaded diodes coupled with alternatively connecting bias branches increases the robustness of the diode module to handle high input voltage or power from the RF path, thus provides enhanced linearity for the RF circuit as compared to single diode configuration.

A second-order all-pass network has at least three Second Generation Current Conveyors (CCIIs). A network input is connected or connectable to a Y port of a first CCII, a Z port of the first CCII is connected to a Y port of a second CCII, an X port of the first CCII is connected to a Y port of a third CCII, and a network output is connected or connectable, directly or indirectly, to a Z port of the second CCII. The X port of the first CCII is connected via a first network element to ground, the Z port of the first CCII is connected via a second network element to ground, an X port of the third CCII is connected via a third network element to ground, and an X port of the second CCII is connected via a fourth network element to ground.