A phase shifter for altering the phase of a radio frequency signal is disclosed herein. A Lange coupler is used having reflective ports that are coupled to artificial transmission lines. The artificial transmission lines provide a reflection transmission path, the length of which can be determined by digital control lines. Transistors placed along the length of the central trace provide independent paths to ground that serve to shorten the electrical length of the ATL. Accordingly, by selectively turning the transistors on/off, the electrical length of the ATL can be selected and thus the amount of phase delay introduced by the phase shifter.

A driver circuit includes a first deglitcher circuit that delays a rising edge or a falling edge of an input signal according to a mode control signal and supplies a first output signal. A second deglitcher circuit receives the first output signal and delays either a rising edge or a falling edge of the first output signal by a second delay according to the mode control signal and supplies a second output signal. Logic gates combine the first and second output signals to supply gate control signals for output transistors to drive the driver circuit output. A sum of the first delay and the second delay determines the total deglitch time defining a pulse width of pulses that are suppressed by the driver circuit and the second delay determines a non-overlap time. The non-overlap time overlaps in time with the total deglitch time.

A system for filter enhancement, preferably including one or more analog taps and a controller, and optionally including one or more couplers. The system is preferably configured to integrate with a filter, such as a passband filter or other frequency-based filter. The system can be configured to integrate with an RF communication system, an RF front end, or any other suitable RF circuitry. A method for filter enhancement, preferably including configuring one or more analog taps, and optionally including calibrating a system for filter enhancement and/or receiving temperature information.

A system for filter enhancement, preferably including one or more analog taps and a controller, and optionally including one or more couplers. The system is preferably configured to integrate with a filter, such as a passband filter or other frequency-based filter. The system can be configured to integrate with an RF communication system, an RF front end, or any other suitable RF circuitry. A method for filter enhancement, preferably including configuring one or more analog taps, and optionally including calibrating a system for filter enhancement and/or receiving temperature information.

A finite impulse response (FIR) filter including an input of the FIR filter that receives an RF input signal, a clock input configured to receive a clock signal, an output of the FIR filter that provides a filtered output signal, a plurality of signal paths including a plurality of sample-and-hold circuits and a plurality of multipliers arranged in parallel, each signal path including a respective sample-and-hold circuit and a respective multiplier being configured to receive the RF input signal and the clock signal to provide a modulated output signal, an adder configured to receive n modulated output signals from the plurality of signal paths and combine the n modulated output signals to produce the filtered output signal, and a controller.

A programmable delay device that provides delays of more than 100 ns over a broad bandwidth is disclosed. The device includes an input stage that employs M sampling switched capacitor elements such that each sampling switched capacitor element samples at a rate of only 1/M of the fundamental sampling rate. The device includes a programmable delay stage with M programmable switched capacitor banks, each programmable switched capacitor bank having N delay switched capacitor storage elements. Thus, the programmable delay stage includes a total of M×N delay switched capacitor storage elements, thereby reducing the sampling rate by a factor of M×N. This reduced sampling rate permits much smaller sampling switches, resulting in reduced leakage current and enabling far longer programmable delay times. Lastly, the device includes an output reconstruction stage that reconstructs a delayed version of the input RF signal by combining signals from the programmable delay stage.

A device includes a first driver circuit coupled to a first bus line, where the first driver circuit includes a first delay element. The first delay element is configured to receive a first input signal and generate a first output signal. The first output signal transitions logic levels after a first delay period when the first input signal transitions from a logic high level to a logic low level. The first output signal transitions logic levels after a second delay period when the first input signal transitions from the logic low level to the logic high level. The first delay element includes a sense amplifier. The first driver circuit is configured to transmit the first output signal over the first bus line. The device also includes a second driver circuit configured to transmit a second output signal over a second bus line.

A driver circuit includes a first deglitcher circuit that delays a rising edge or a falling edge of an input signal according to a mode control signal and supplies a first output signal. A second deglitcher circuit receives the first output signal and delays either a rising edge or a falling edge of the first output signal by a second delay according to the mode control signal and supplies a second output signal. Logic gates combine the first and second output signals to supply gate control signals for output transistors to drive the driver circuit output. A sum of the first delay and the second delay determines the total deglitch time defining a pulse width of pulses that are suppressed by the driver circuit and the second delay determines a non-overlap time. The non-overlap time overlaps in time with the total deglitch time.

A system for filter enhancement, preferably including one or more analog taps and a controller, and optionally including one or more couplers. The system is preferably configured to integrate with a filter, such as a passband filter or other frequency-based filter. The system can be configured to integrate with an RF communication system, an RF front end, or any other suitable RF circuitry. A method for filter enhancement, preferably including configuring one or more analog taps, and optionally including calibrating a system for filter enhancement and/or receiving temperature information.

A system for filter enhancement, preferably including one or more analog taps and a controller, and optionally including one or more couplers. The system is preferably configured to integrate with a filter, such as a passband filter or other frequency-based filter. The system can be configured to integrate with an RF communication system, an RF front end, or any other suitable RF circuitry. A method for filter enhancement, preferably including configuring one or more analog taps, and optionally including calibrating a system for filter enhancement and/or receiving temperature information.