A bridge combiner can be implemented as a coupling circuit that includes a common node and configured to couple the common node to a first group of filters through a first path and to couple the common node to a second group of one or more filters through a second path. The coupling circuit can include a resonator such that an impedance provided by each filter of the first group for a signal in each band of the second group results in the signal being sufficiently excluded from the first path, and such that an impedance provided by each filter of the second group for a signal in each band of the first group results in the signal being sufficiently excluded from the second path.

A half-bride combiner can be implemented as a coupling circuit having a common node and configured to couple the common node to one of first and second groups of filters through a first path and to couple the common node to the other group through a second path. The coupling circuit can be further configured such that the impedance provided by each filter of the one of the first and second groups for a signal in each band of the other group results in the signal being sufficiently excluded from the first path.

An implantable pulse generator including a header, a can, and a filtered feedthrough assembly. The header including lead connector blocks. The can coupled to the header and including a wall and an electronic substrate housed within the wall. The filtered feedthrough assembly including a flange mounted to the can and having a feedthrough port, a plurality of feedthrough wires extending through the feedthrough port, and an insulator brazed to the feedthrough port of the flange. The filtered feedthrough assembly further including a capacitor having the plurality of feedthrough wires extending there through, an insulating washer positioned between and abutting the insulator and the capacitor at least in the area of the braze joint such that the capacitor and the braze joint are non-conductive, and an electrically conductive material adhered to the capacitor and the flange for grounding of the capacitor.

An architecture can include a first group of filters each configured to support a band such that a first frequency range covers the respective bands, and a second group of one or more filters each configured to support a band such that a second frequency range covers the respective one or more bands. Each filter of the first group can be configured to provide an impedance at or near a short circuit impedance for a signal in each band of the second group, and each filter of the second group can be configured to provide an impedance at or near a short circuit impedance for a signal in each band of the first group. The filters of the first and second groups can be implemented as one or more multiplexers. The architecture can further include a coupling circuit having a common node and configured to couple the common node to the one or more multiplexers through a first path and a second path. The coupling circuit can be further configured such that the impedance provided by each filter of the first group for the signal in each band of the second group results in the signal being sufficiently excluded from the first path, and such that the impedance provided by each filter of the second group for the signal in each band of the first group results in the signal being sufficiently excluded from the second path.

An implantable pulse generator including a header, a can, and a filtered feedthrough assembly. The header including lead connector blocks. The can coupled to the header and including a wall and an electronic substrate housed within the wall. The filtered feedthrough assembly including a flange mounted to the can and having a feedthrough port, a plurality of feedthrough wires extending through the feedthrough port, and an insulator brazed to the feedthrough port of the flange. The filtered feedthrough assembly further including a capacitor having the plurality of feedthrough wires extending there through, an insulating washer positioned between and abutting the insulator and the capacitor at least in the area of the braze joint such that the capacitor and the braze joint are non-conductive, and an electrically conductive material adhered to the capacitor and the flange for grounding of the capacitor.

A capacitor component includes a body including a plurality of dielectric layers having a layered structure and a first internal electrode and a second internal electrode alternately disposed with respective dielectric layers of the plurality of dielectric layers disposed therebetween. A first external electrode is disposed on a first surface and a second surface of the body opposing each other, and is connected to the first internal electrode. A second external electrode is disposed on at least one of a third surface and a fourth surface of the body connecting the first surface to the second surface and opposing each other, and is connected to the second internal electrode. The first internal electrode and the second internal electrode provide a plurality of resonance frequencies. In some examples, each of the first internal electrode and the second internal electrode is divided into a plurality of regions spaced apart from each other.

A power supply converter and a method for manufacturing the same are provided. The power supply converter includes an inductance component and a power component, wherein the inductance component includes: a first magnetic substrate, provided with a first via, the first magnetic substrate including a first surface and a second surface, and a first pin being provided on the first surface; a second magnetic substrate, provided with a second via, and having a second surface provided with a second pin; an inductance coil, provided between the first surface and the second surface and having a first end and a second end formed at the vias and connected to the first and second pin, respectively; and a filling part, at least partly filling the vias, wherein the power component and the inductance component are stacked, are in contact and are coupled to each other.

A filter capacitor discharge circuit includes a high-voltage terminal, a signal preparation circuit, a low-pass filter, a voltage level detector, a timer unit, and a switch unit. The signal preparation circuit receives a detection signal corresponding to an AC voltage from the high-voltage terminal, and generates a voltage signal according to the detection signal. The low-pass filter provides a filtered signal according to the voltage signal. The voltage level detector checks whether a voltage difference between the voltage signal and the filtered signal is less than a predetermined value. When the voltage difference is less than the predetermined value, the timer unit performs time calculation to accumulate a timing result. When the timing result exceeds a predetermined time, the switch unit is turned on so that the firster capacitor is discharged through the switch unit.

The present invention is directed to an EMI feedthrough filter terminal assembly. The EMI feedthrough filter terminal assembly comprises: a feedthrough filter capacitor having a plurality of first electrode layers and a plurality of second electrode layers, a first passageway therethrough having a first termination surface conductively coupling the plurality of first electrode layers, a second termination surface conductively coupling the plurality of second electrode layers; a feedthrough ferrule conductively coupled to the feedthrough filter capacitor via the second termination surface; at least one conductive terminal pin extending through the passageway in conductive relation with the plurality of first electrode layers; an insulator fixed to the feedthrough ferrule for conductively isolating the conductive terminal pin from the feedthrough ferrule; and a laminated insulative layer between the insulator and the feedthrough filter capacitor.

A multilayer filter may include a plurality of dielectric layers stacked in a Z-direction. A first conductive layer may overlie one of the dielectric layers, and a second conductive layer may overlie another of the dielectric layers and be spaced apart from the first conductive layer in the Z-direction. A first via may be connected with the second conductive layer at a first location. A second via may be connected with the second conductive layer at a second location that is spaced apart in a first direction from the first location. The first conductive layer may overlap the second conductive layer at an overlapping area to form a capacitor. At least a portion of the overlapping area may be located between the first location and the second location in the first direction. The second conductive layer may be free of via connections that intersect the overlapping area.