Patent classifications
H03H2011/0477
Tunable grounded positive and negative impedance multiplier
A tunable impedance multiplier with high multiplication factor is described. A single externally connected resistor is used and the multiplier is free of passive elements. The circuit can realize a positive or a negative impedance multiplier. Applications of the design to low and high pass filters are also presented. The simulation and experimental results show that the new design enjoys a multiplication factor above 400 at 2 Hz-to 7 MHz.
Method for tunably multiplying an impedance
A tunable impedance multiplier with high multiplication factor is described. A single externally connected resistor is used and the multiplier is free of passive elements. The circuit can realize a positive or a negative impedance multiplier. Applications of the design to low and high pass filters are also presented. The simulation and experimental results show that the new design enjoys a multiplication factor above 400 at 2 Hz-to 7 MHz.
METHOD FOR TUNABLY MULTIPLYING AN IMPEDANCE
A tunable impedance multiplier with high multiplication factor is described. A single externally connected resistor is used and the multiplier is free of passive elements. The circuit can realize a positive or a negative impedance multiplier. Applications of the design to low and high pass filters are also presented. The simulation and experimental results show that the new design enjoys a multiplication factor above 400 at 2 Hz-to 7 MHz.
TUNABLE GROUNDED POSITIVE AND NEGATIVE IMPEDANCE MULTIPLIER
A tunable impedance multiplier with high multiplication factor is described. A single externally connected resistor is used and the multiplier is free of passive elements. The circuit can realize a positive or a negative impedance multiplier. Applications of the design to low and high pass filters are also presented. The simulation and experimental results show that the new design enjoys a multiplication factor above 400 at 2 Hz-to 7 MHz.
Jitter attenuation buffer structure
A method and apparatus are described to implement a bandpass filter in a current mode logic (CML) stage of a clock tree in an electronic system. The bandpass filter has a bandpass filter transfer function to attenuate frequencies lower than and higher than a carrier frequency. The bandpass filter uses adjustable active inductors and capacitive source degeneration. Adjustable resistors may be controlled to move a peak frequency of the bandpass filter transfer function to a higher or lower frequency. The adjustable active inductors and capacitive degeneration may consist of field effect transistors.
Grounded capacitance multipliers with electronic tuning possibility using single current feedback amplifier
The present invention relates to a capacitance multiplier topology suitable for both positive and negative capacitance multiplication having a minimum configuration consisting of a current feedback amplifier (CFOA), two resistors and a reference capacitor, with each C-multiplier having a respective capacitance amplification constant k which is externally adjustable. Such a capacitance multiplier has less parasitic components, occupies a smaller chip area with higher simulated capacitance value.
GROUNDED CAPACITANCE MULTIPLIERS WITH ELECTRONIC TUNING POSSIBILITY USING SINGLE CURRENT FEEDBACK AMPLIFIER
The present invention relates to a capacitance multiplier topology suitable for both positive and negative capacitance multiplication having a minimum configuration consisting of a current feedback amplifier (CFOA), two resistors and a reference capacitor, with each C-multiplier having a respective capacitance amplification constant k which is externally adjustable. Such a capacitance multiplier has less parasitic components, occupies a smaller chip area with higher simulated capacitance value.
Floating immittance emulator
The floating immittance emulator is presented in four embodiments in which four new topologies for emulating floating immittance functions are detailed. Each circuit uses three current-feedback operational-amplifiers (CFOAs) and three passive elements. The present topologies can emulate lossless and lossy floating inductances; capacitance, resistance, and inductance multipliers; and frequency-dependent positive and negative resistances.
Floating immittance emulator
The floating immittance emulator is presented in four embodiments in which four new topologies for emulating floating immittance functions are detailed. Each circuit uses three current-feedback operational-amplifiers (CFOAs) and three passive elements. The present topologies can emulate lossless and lossy floating inductances; capacitance, resistance, and inductance multipliers; and frequency-dependent positive and negative resistances.
Floating immittance emulator
The floating immittance emulator is presented in four embodiments in which four new topologies for emulating floating immittance functions are detailed. Each circuit uses three current-feedback operational-amplifiers (CFOAs) and three passive elements. The present topologies can emulate lossless and lossy floating inductances; capacitance, resistance, and inductance multipliers; and frequency-dependent positive and negative resistances.