In one illustrative embodiment, an equalizer includes: a shift register, an array of multipliers, an array of multiplexers, and a summer. The shift register provides receive signal samples at each tap. Each multiplier in the array multiplies one of said receive signal samples by a respective coefficient to produce a product, with at least one of said multipliers coupled to a fixed tap. Each multiplexer in the array supplies an associated one of said multipliers with a receive signal sample from a selectable tap. The summer sums the products to produce a filtered output signal. To reduce hardware requirements, coefficient multipliers may be multiplexed to a reduced set of taps, and the dynamic range of the coefficients may be increased by overlapping the sets for different multipliers. Methods of tap selection and coefficient adaptation are disclosed.

In one illustrative embodiment, an equalizer includes: a shift register, an array of multipliers, an array of multiplexers, and a summer. The shift register provides receive signal samples at each tap. Each multiplier in the array multiplies one of said receive signal samples by a respective coefficient to produce a product, with at least one of said multipliers coupled to a fixed tap. Each multiplexer in the array supplies an associated one of said multipliers with a receive signal sample from a selectable tap. The summer sums the products to produce a filtered output signal. To reduce hardware requirements, coefficient multipliers may be multiplexed to a reduced set of taps, and the dynamic range of the coefficients may be increased by overlapping the sets for different multipliers. Methods of tap selection and coefficient adaptation are disclosed.

One example includes an equalizer system. The system includes a filter system configured to receive digital sample blocks associated with an input signal and to provide equalized digital sample blocks associated with the respective digital sample blocks based on adaptive tap weights. Each of the digital sample blocks includes samples and each of the equalized digital sample blocks includes equalized samples. The system also includes a sample set selector to select a subset of equalized samples from each of the equalized digital sample blocks at the output of the filter and an error estimator configured to implement an error estimation algorithm on the subset of the equalized samples to determine a residual error associated with the equalized samples. The system further includes a tap weight generator configured to generate the adaptive tap weights in response to the residual error and to provide the adaptive tap weights to the filter.

A compensator includes a processor, and a storage device that is connected to the processor and stores measured input values that are measured values of an input to a subject to control and measured output values that are measured values of an output from the subject to control. The processor performs processing for identifying, from the measured input values and the measured output values, a first coefficient configuring a finite impulse response filter, processing for determining, based on the first coefficient, a second coefficient configuring an infinite impulse response filter, and identifying an inverse system for the subject to control, the inverse system including the second coefficient and a part of the first coefficient, and processing for estimating an input value to be input to the subject to control from a weighted sum of target values of the output.

One example includes an equalizer system. The system includes a filter system configured to receive digital sample blocks associated with an input signal and to provide equalized digital sample blocks associated with the respective digital sample blocks based on adaptive tap weights. Each of the digital sample blocks includes samples and each of the equalized digital sample blocks includes equalized samples. The system also includes a sample set selector to select a subset of equalized samples from each of the equalized digital sample blocks at the output of the filter and an error estimator configured to implement an error estimation algorithm on the subset of the equalized samples to determine a residual error associated with the equalized samples. The system further includes a tap weight generator configured to generate the adaptive tap weights in response to the residual error and to provide the adaptive tap weights to the filter.

An apparatus may include a circuit including a filter configured to update one or more adaptive coefficients of the filter based on an error signal. Further, the circuit may update a constrained coefficient of the filter based on the one or more adaptive coefficients, the constrained coefficient and a desired value. Moreover, the circuit may generate a sample of a sample sequence based on the one or more adaptive coefficients and the updated constrained coefficient, the error signal being based on the sample sequence.

An electronic device is disclosed that includes an analog-to-digital converter circuit, an adaptive filter circuit coupled to the analog-to-digital converter circuit to correct one or more circuit impairments in the analog-to-digital converter circuit, a training signal generator circuit to generate training signals, and an amplitude detector circuit configured to suspend generation of the training signals and cause the adaptive filter circuit to suspend adaptation when the input signal is above a predetermined threshold.

One example includes an equalizer system. The system includes a filter system configured to receive digital sample blocks associated with an input signal and to provide equalized digital sample blocks associated with the respective digital sample blocks based on adaptive tap weights. Each of the digital sample blocks includes samples and each of the equalized digital sample blocks includes equalized samples. The system also includes a sample set selector to select a subset of equalized samples from each of the equalized digital sample blocks at the output of the filter and an error estimator configured to implement an error estimation algorithm on the subset of the equalized samples to determine a residual error associated with the equalized samples. The system further includes a tap weight generator configured to generate the adaptive tap weights in response to the residual error and to provide the adaptive tap weights to the filter.

This invention is designed for use in transmission of data between downhole module in a wellbore and a controlling module at the surface. The invention provides an apparatus for receiving data signals from a telemetry module comprising first and second adaptive equalisers, and in which in a first modulation mode the coefficients of the first adaptive equaliser are updated until an error signal falls below a predetermined threshold and in a second modulation mode the coefficients of the first adaptive equaliser are locked and coefficients of the second adaptive equaliser are updated to continually minimise an error signal in which the number of bits encoded by the symbols of the first signal in an initial modulation mode is fewer than the number of bits encoded by the symbols of the second signal in a subsequent modulation mode.

An apparatus may include a circuit including a filter configured to update one or more adaptive coefficients of the filter based on an error signal. Further, the circuit may update a constrained coefficient of the filter based on the one or more adaptive coefficients, the constrained coefficient and a desired value. Moreover, the circuit may generate a sample of a sample sequence based on the one or more adaptive coefficients and the updated constrained coefficient, the error signal being based on the sample sequence.