H03H21/0007

Precision digital to analog conversion in the presence of variable and uncertain fractional bit contributions
11368163 · 2022-06-21 · ·

This disclosure describes systems, methods, and apparatus for a digital-to-analog (DAC) converter, that can be part of a variable capacitor and/or a match network. The DAC can include a digital input, an analog output, N contributors (e.g., switched capacitors), and an interconnect topology connecting the N contributors, generating a sum of their contributions (e.g., sum of capacitances), and providing the sum to the analog output. The N contributors can form a sub-binary sequence when their contributions to the sum are ordered by average contribution. Also, the gap size between a maximum contribution of one contributor, and a minimum contribution of a subsequent contributor, is less than D, where D is less than or equal to two time a maximum contribution of the first or smallest of the N contributors.

Sensor module

According to one embodiment, a sensor module includes at least one sensor and at least one switch. The sensor includes a first piezoelectric element. The first piezoelectric element includes a first electrode. The first piezoelectric element is set with a resonance frequency to resonate at a vibration frequency of a detection target. The switch includes a second piezoelectric element. The second piezoelectric element includes a second electrode connected to the first electrode and a third electrode electrically separated from the second electrode.

PRECISION DIGITAL TO ANALOG CONVERSION IN THE PRESENCE OF VARIABLE AND UNCERTAIN FRACTIONAL BIT CONTRIBUTIONS
20210152181 · 2021-05-20 ·

This disclosure describes systems, methods, and apparatus for a digital-to-analog (DAC) converter, that can be part of a variable capacitor and/or a match network. The DAC can include a digital input, an analog output, N contributors (e.g., switched capacitors), and an interconnect topology connecting the N contributors, generating a sum of their contributions (e.g., sum of capacitances), and providing the sum to the analog output. The N contributors can form a sub-binary sequence when their contributions to the sum are ordered by average contribution. Also, the gap size between a maximum contribution of one contributor, and a minimum contribution of a subsequent contributor, is less than D, where D is less than or equal to two time a maximum contribution of the first or smallest of the N contributors.

Precision digital to analog conversion in the presence of variable and uncertain fractional bit contributions
10944416 · 2021-03-09 · ·

This disclosure describes systems, methods, and apparatus for a digital-to-analog (DAC) converter, that can be part of a variable capacitor and/or a match network. The DAC can include a digital input, an analog output, N contributors (e.g., switched capacitors), and an interconnect topology connecting the N contributors, generating a sum of their contributions (e.g., sum of capacitances), and providing the sum to the analog output. The N contributors can form a sub-binary sequence when their contributions to the sum are ordered by average contribution. Also, the gap size between a maximum contribution of one contributor, and a minimum contribution of a subsequent contributor, is less than D, where D is less than or equal to two time a maximum contribution of the first or smallest of the N contributors.

SENSOR MODULE

According to one embodiment, a sensor module includes at least one sensor and at least one switch. The sensor includes a first piezoelectric element. The first piezoelectric element includes a first electrode. The first piezoelectric element is set with a resonance frequency to resonate at a vibration frequency of a detection target. The switch includes a second piezoelectric element. The second piezoelectric element includes a second electrode connected to the first electrode and a third electrode electrically separated from the second electrode.

PRECISION DIGITAL TO ANALOG CONVERSION IN THE PRESENCE OF VARIABLE AND UNCERTAIN FRACTIONAL BIT CONTRIBUTIONS
20200266826 · 2020-08-20 ·

This disclosure describes systems, methods, and apparatus for a digital-to-analog (DAC) converter, that can be part of a variable capacitor and/or a match network. The DAC can include a digital input, an analog output, N contributors (e.g., switched capacitors), and an interconnect topology connecting the N contributors, generating a sum of their contributions (e.g., sum of capacitances), and providing the sum to the analog output. The N contributors can form a sub-binary sequence when their contributions to the sum are ordered by average contribution. Also, the gap size between a maximum contribution of one contributor, and a minimum contribution of a subsequent contributor, is less than D, where D is less than or equal to two time a maximum contribution of the first or smallest of the N contributors.

Precision digital to analog conversion in the presence of variable and uncertain fractional bit contributions
10623012 · 2020-04-14 · ·

This disclosure describes systems, methods, and apparatus for a digital-to-analog (DAC) converter, that can be part of a variable capacitor and/or a match network. The DAC can include a digital input, an analog output, N contributors (e.g., switched capacitors), and an interconnect topology connecting the N contributors, generating a sum of their contributions (e.g., sum of capacitances), and providing the sum to the analog output. The N contributors can form a sub-binary sequence when their contributions to the sum are ordered by average contribution. Also, the gap size between a maximum contribution of one contributor, and a minimum contribution of a subsequent contributor, is less than D, where D is less than or equal to two time a maximum contribution of the first or smallest of the N contributors.

PRECISION DIGITAL TO ANALOG CONVERSION IN THE PRESENCE OF VARIABLE AND UNCERTAIN FRACTIONAL BIT CONTRIBUTIONS
20190348992 · 2019-11-14 ·

This disclosure describes systems, methods, and apparatus for a digital-to-analog (DAC) converter, that can be part of a variable capacitor and/or a match network. The DAC can include a digital input, an analog output, N contributors (e.g., switched capacitors), and an interconnect topology connecting the N contributors, generating a sum of their contributions (e.g., sum of capacitances), and providing the sum to the analog output. The N contributors can form a sub-binary sequence when their contributions to the sum are ordered by average contribution. Also, the gap size between a maximum contribution of one contributor, and a minimum contribution of a subsequent contributor, is less than D, where D is less than or equal to two time a maximum contribution of the first or smallest of the N contributors.