H03H2218/085

Subcarrier based adaptive equalization of electrical filtering effects on sub-carrier multiplexed signals
11539447 · 2022-12-27 · ·

Consistent with the present disclosure, the above-described subcarrier noise, which may be characterized as a linear filtering effect, may be reduced or eliminated by providing a first multiple-input multiple output (MIMO) circuits at the transmit end of an optical link and providing a second MIMO circuit at the receive end of the optical link. The first MIMO may include a first plurality of filters, each of which may include a finite-impulse response (FIR) filter having variable coefficients or tap weights that may be changed or adapted to minimize subcarrier noise associated with the modulator, as well as D/A and analog circuitry, at the transmit end of the optical link. In addition, the second MIMO may include a second plurality of filters, each of which may also include an FIR filter having variable coefficients or tap weights that may be changed or adapted to minimized subcarrier noise associated with the optical hybrids, as well as A/D and analog circuitry, at the receive end of the optical link. In one example, a least means square (LMS) technique may be employed to calculate desired coefficients or tap weights whereby an error determined based on the signal detected at the receiver is minimized to update the coefficients of the FIR filters.

FIR FILTER, FILTERING METHOD BY FIR FILTER, AND NON-TRANSITORY COMPUTER READABLE MEDIUM STORING CONTROL PROGRAM
20240056058 · 2024-02-15 · ·

An FIR filter includes: an address signal generation unit configured to generate an address signal of an address value in accordance with k bit values that correspond to k filter coefficients having a symmetric property; and an extraction unit configured to extract a computation result that corresponds to the address value indicated by the address signal from the table, in which, in the table, a plurality of computation results in which sets of computation results indicating the same values among 2 to the power of k patterns of computation results which are obtained by adding up k results of multiplication, the k results of multiplication being results obtained by multiplying each of k filter coefficients having a symmetric property by each of k bit values that correspond to k filter coefficients are commonly shared, and the plurality of address values are associated with each other.

SUBCARRIER BASED ADAPTIVE EQUALIZATION OF ELECTRICAL FILTERING EFFECTS ON SUB-CARRIER MULTIPLEXED SIGNALS
20190268076 · 2019-08-29 ·

Consistent with the present disclosure, the above-described subcarrier noise, which may be characterized as a linear filtering effect, may be reduced or eliminated by providing a first multiple-input multiple output (MIMO) circuits at the transmit end of an optical link and providing a second MIMO circuit at the receive end of the optical link. The first MIMO may include a first plurality of filters, each of which may include a finite-impulse response (FIR) filter having variable coefficients or tap weights that may be changed or adapted to minimize subcarrier noise associated with the modulator, as well as D/A and analog circuitry, at the transmit end of the optical link. In addition, the second MIMO may include a second plurality of filters, each of which may also include an FIR filter having variable coefficients or tap weights that may be changed or adapted to minimized subcarrier noise associated with the optical hybrids, as well as A/D and analog circuitry, at the receive end of the optical link. In one example, a least means square (LMS) technique may be employed to calculate desired coefficients or tap weights whereby an error determined based on the signal detected at the receiver is minimized to update the coefficients of the FIR filters.

HORNER FORM ARBITRARY COEFFICIENT MULTIPLIERLESS FIR FILTER
20250309866 · 2025-10-02 ·

The present disclosure provides implementations of a filter suitable for use in quantum computing systems and other low-power, high-speed applications. In some aspects, a filter circuit includes a series-connected arrangement of unit delays and summers in an alternating pattern. The filter circuit further includes a plurality of coefficient multipliers, each having a respective output connected with one or more of the summers, and each including a multiplexing stage including one or more multiplexers addressed using one or more bits of a respective input coefficient vector. A first coefficient multiplier of the plurality of coefficient multipliers includes a partial product stage configured to provide a plurality of integer partial products of an input data vector to the multiplexing stages of the plurality of coefficient multipliers.