Patent classifications
H03H7/38
Method, System, and Apparatus for Resonator Circuits and Modulating Resonators
Embodiments of resonator circuits and modulating resonators and are described generally herein. One or more acoustic wave resonators may be coupled in series or parallel to generate tunable filters. One or more acoustic wave resonances may be modulated by one or more capacitors or tunable capacitors. One or more acoustic wave modules may also be switchable in a filter. Other embodiments may be described and claimed.
Method, System, and Apparatus for Resonator Circuits and Modulating Resonators
Embodiments of resonator circuits and modulating resonators and are described generally herein. One or more acoustic wave resonators may be coupled in series or parallel to generate tunable filters. One or more acoustic wave resonances may be modulated by one or more capacitors or tunable capacitors. One or more acoustic wave modules may also be switchable in a filter. Other embodiments may be described and claimed.
Window Function Processing Module
The present application provides a window function processing module including an integrating circuit, configured to receive an integrating input signal, the integrating circuit comprising an operational amplifier; an integrating capacitor, coupled to an output terminal and a first input terminal of the operational amplifier; and an adjustable impedance module, coupled between the first input terminal of the operational amplifier and an integrating input terminal of the integrating circuit, wherein the adjustable impedance module is controlled by at least one control signal to adjust an impedance value of the adjustable impedance module; and a control unit, coupled to the integrating circuit, configured to generate the at least one control signal according to a window function, to adjust the integration gain of the integrating circuit, such that the integrating output signal is related to an operation result of the integrating input signal and the window function.
Window Function Processing Module
The present application provides a window function processing module including an integrating circuit, configured to receive an integrating input signal, the integrating circuit comprising an operational amplifier; an integrating capacitor, coupled to an output terminal and a first input terminal of the operational amplifier; and an adjustable impedance module, coupled between the first input terminal of the operational amplifier and an integrating input terminal of the integrating circuit, wherein the adjustable impedance module is controlled by at least one control signal to adjust an impedance value of the adjustable impedance module; and a control unit, coupled to the integrating circuit, configured to generate the at least one control signal according to a window function, to adjust the integration gain of the integrating circuit, such that the integrating output signal is related to an operation result of the integrating input signal and the window function.
Series stack switch circuit with voltage clamping and power recovery
Various embodiments are directed to a switch circuit comprising: two terminal nodes, comprising an upper node and a lower node; a plurality of switch modules, connected in series between the upper node and the lower node, wherein each of the switch modules comprises a switch, a rectifier, and a capacitor; a connecting circuit, coupled to the switch modules; and a power converter, coupled to the connecting circuit and to a power sink. The switch circuit is configured to limit a voltage or a component of a voltage in the switch circuit, and to recover power from the limiting of the voltage, wherein recovering the power comprises diverting power from the switch modules via the connecting circuit to the power converter, and the power converter outputting the power to the power sink.
Series stack switch circuit with voltage clamping and power recovery
Various embodiments are directed to a switch circuit comprising: two terminal nodes, comprising an upper node and a lower node; a plurality of switch modules, connected in series between the upper node and the lower node, wherein each of the switch modules comprises a switch, a rectifier, and a capacitor; a connecting circuit, coupled to the switch modules; and a power converter, coupled to the connecting circuit and to a power sink. The switch circuit is configured to limit a voltage or a component of a voltage in the switch circuit, and to recover power from the limiting of the voltage, wherein recovering the power comprises diverting power from the switch modules via the connecting circuit to the power converter, and the power converter outputting the power to the power sink.
Systems and methods for antenna impedance matching
Systems and methods for antenna impedance matching provide an integrated circuit (IC) configured to be placed proximate an antenna that includes a sensor based on a coupler having forward and reverse power detectors for detecting an impedance at the antenna and provides dynamic impedance matching. Further, exemplary aspects of the present disclosure contemplate using a single wire bus capable of supplying power and providing a bidirectional serial communication link to allow communication between the IC of the present disclosure and a control circuit (e.g., a bridge or transceiver). Further aspects of the present disclosure contemplate providing systems and methods for calibrating the IC at production. Further, the accuracy of the impedance sensor may be dependent on accurate determination of power and phase difference between forward and reverse coupled signals, and a system for removing an offset between the forward and reverse power detectors is disclosed.
Systems and methods for antenna impedance matching
Systems and methods for antenna impedance matching provide an integrated circuit (IC) configured to be placed proximate an antenna that includes a sensor based on a coupler having forward and reverse power detectors for detecting an impedance at the antenna and provides dynamic impedance matching. Further, exemplary aspects of the present disclosure contemplate using a single wire bus capable of supplying power and providing a bidirectional serial communication link to allow communication between the IC of the present disclosure and a control circuit (e.g., a bridge or transceiver). Further aspects of the present disclosure contemplate providing systems and methods for calibrating the IC at production. Further, the accuracy of the impedance sensor may be dependent on accurate determination of power and phase difference between forward and reverse coupled signals, and a system for removing an offset between the forward and reverse power detectors is disclosed.
Method and Apparatus to Optimize Power Clamping
A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.
Method and Apparatus to Optimize Power Clamping
A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.