A crystal oscillator includes an oscillating substrate, a hollow frame, a first electrode, and a second electrode. The oscillating substrate includes a main oscillating region and a thinned region that has a thickness smaller than that of the main oscillating region. The first and second electrodes are disposed on a first surface of the oscillating substrate and a second surface opposite to the first surface, respectively. The hollow frame is disposed on the second surface. The second electrode includes a second electrode portion that has at least one opening in positional correspondence with the thinned region. A method for making the crystal oscillator is also provided herein.

Structures for suppressing parasitic acoustic waves in semiconductor structures and integrated circuit devices are described. Such integrated circuit devices can, typically, produce undesirable acoustic wave resonances, and the acoustic waves can degrade the performance of the devices. In that context, some embodiments described herein relate to spoiling a conductive path that participates in the generation of acoustic waves. Some embodiments relate to spoiling acoustic characteristics of an acoustic resonant structure that may be present in the vicinity of the device. Combined embodiments that spoil the conductive path and acoustic characteristics are also possible.

A solidly mounted resonator having an electromagnetic shielding structure and a method for manufacturing the same. The solidly mounted resonator includes: a substrate; an acoustic-wave reflecting layer formed on the substrate; a resonance function layer formed on the acoustic-wave reflecting layer; and a metal shielding wall formed on the substrate, wherein the metal shielding wall surrounds an effective region in the acoustic-wave reflecting layer and the resonance function layer. The electromagnetic shielding structure is formed simultaneously with the resonator, and it is not necessary to provide an additional electromagnetic shielding device. An influence of an external or internal electromagnetic interference source on the resonator is avoided while ensuring a small dimension and a high performance of the resonator.

Disclosed is an acoustic resonator including a substrate including a first cavity, a first electrode formed above the substrate, a piezoelectric layer formed on one surface of the first electrode, and a second electrode formed on one surface of the piezoelectric layer. Here, the piezoelectric layer includes a longitudinal section not to cover a longitudinal section of the first electrode. Also, the second electrode covers the longitudinal section of the piezoelectric layer and extends to a first interpolar cavity which spaces the first electrode at least partially apart from the piezoelectric layer. A quality factor may be increased by fixing an increase in resistance which occurs due to thin film electrodes.

A BAW resonance device comprises a first layer including a cavity located on a first side, a first electrode having a first end located in the cavity and a second end contacting with the first layer, a second layer located on the first side, and a second electrode located on the second layer above the cavity, wherein the first electrode and the second electrode are located on two sides of the second layer. The first electrode comprises a first electrode layer and a second electrode layer, and the second electrode layer and the second layer are located on two sides of the first electrode layer. The second electrode comprises a third electrode layer and a fourth electrode layer, and the second layer and the fourth electrode layer are located on two sides of the third electrode layer. Thus, the electrical resistance is lowered and the electrical losses are reduced.

A third through hole is formed in a crystal resonator plate of a crystal resonator to penetrate between a first main surface and a second main surface. A through electrode of the third through hole is conducted to a first excitation electrode. A seventh through hole is formed in a first sealing member of the crystal resonator to penetrate between a first main surface and a second main surface. The through electrode of the third through hole is conducted to the through electrode of the seventh through hole. The third through hole is not superimposed to the seventh through hole in plan view.

A high Q acoustic BAW resonator with high coupling and improved spurious mode suppression is given. The BAW resonator comprises an active resonator region (AR) formed by an overlap of the three layers bottom electrode (BE), piezoelectric layer (PL) and top electrode layer (TE). An inner-flap (IF) is formed by a dielectric 3D structure sitting on a marginal region (MR) of the active resonator region (AR) or adjacent thereto, extending inwardly towards the center thereof and having a section that runs in parallel and distant to the top surface of the resonator keeping an inner gap (IG) thereto or an angle Θ.

Aspects of this disclosure relate to methods of manufacturing bulk acoustic wave components. Such methods include plasma dicing to singulate individual bulk acoustic wave components. A buffer layer can be formed over a substrate of bulk acoustic wave components such that streets are exposed. The bulk acoustic wave components can be plasma diced along the exposed streets to thereby singulate the bulk acoustic wave components

A BAW resonator with an improved lateral energy confinement is provided. The resonator has a bottom electrode in a bottom electrode layer, a top electrode in a top electrode layer and a piezoelectric layer between the bottom electrode layer and the top electrode layer. The piezoelectric layer comprises piezoelectric materials of different piezoelectric polarities.

A semiconductor device is provided. The semiconductor device incudes: a first sub-semiconductor structure including a dielectric layer; and a second sub-semiconductor structure, at least including a carrier substrate, and being bonded to the first sub-semiconductor structure. The first sub-semiconductor structure or the second sub-semiconductor structure includes a charge accumulation preventing layer, and the charge accumulation preventing layer is disposed between the carrier substrate and the dielectric layer, and is configured to avoid an undesired conductive channel from being generated due to charge accumulation on a surface of the carrier substrate.