A transmission filter is arranged in a first filter region and has one or more acoustic wave resonators, a plurality of terminal electrodes, and a plurality of wires. A reception filter is arranged in a second filter region and has one or more acoustic wave resonators, a plurality of terminal electrodes, and a plurality of wires. The first filter region and the second filter region are arranged adjacently to each other and have at least sides constituting a pair and opposing to each other. At least either one of the first filter region and the second filter region has no wire extending along one side in a forbidden region that is defined by a width including a terminal electrode nearest to the one side, along the one side and over the one side opposing to the other filter region.

The disclosure provides a method for assembling and interconnecting FBAR filter and an electronic device. The method includes constructing an equivalent circuit model of an assembled FBAR filter according to a circuit model of a filter chip and the grounding circuit of the FBAR filter; modeling, simulating and calculating the grounding circuit to extract parasitic parameters corresponding to the grounding pad and a grounding bond-wire of the grounding circuit, respectively; feedbacking the parasitic parameters back into the equivalent circuit model, and using the circuit simulation software to obtain an S parameter of the filter; adjusting the parasitic parameters of the grounding circuit to optimize an S parameter performance of the FBAR filter: obtaining an optimal assembly configuration of the FBAR filter to guide the assembly. The parasitic parameters include a parasitic inductance of the grounding bond-wire and a parasitic capacitance and parasitic inductance of the grounding pad.

A surface acoustic wave device includes a piezoelectric substrate, a supportive layer, a cover layer and a pillar bump. The supportive layer is disposed on the piezoelectric substrate and around a transducer, the cover layer covers the supportive layer, and the pillar bump is located in a lower via hole of the supportive layer and an upper via hole of the cover layer. The upper via hole has a lateral opening located on a lateral surface of the cover layer, and the pillar bump in the cover layer protrudes from the lateral surface of the cover layer via the lateral opening.

A torque sensor chip including a semiconductor substrate, an acoustic reflector formed on the semiconductor substrate, and first and second Lamb wave resonators (LWRs). The first LWR is formed on a side of the acoustic reflector opposite the semiconductor substrate. The first LWR is at a first angle with respect to an axis of the IC. The second LWR also is formed on the side of the acoustic reflector opposite the semiconductor substrate. The second LWR is at a second angle, different than the first angle, with respect to the axis of the IC.

A method of fabricating a bonded wafer with low carrier lifetime in silicon comprises providing a silicon substrate having opposing top and bottom surfaces, modifying a top portion of the silicon substrate to reduce carrier lifetime in the top portion relative to the carrier lifetime in portions of the silicon substrate other than the top portion, bonding a piezoelectric layer having opposing top and bottom surfaces separated by a distance T over the top surface of the silicon substrate, and providing a pair of electrodes having fingers that are inter-digitally dispersed on a top surface of the piezoelectric layer, the electrodes comprising a portion of a Surface Acoustic Wave (SAW) device. The modifying and bonding steps may be performed in any order. The modified top portion of the silicon substrate prevents the creation of a parasitic conductance within that portion during operation of the SAW device.

A double mode SAW (DMS) filter includes: a plurality of interdigital transducers (IDTs), each having a plurality of Type 1 electrode fingers and a plurality of Type 2 electrode fingers formed on a piezoelectric substrate, wherein one Type 2 electrode finger among the plurality of Type 2 electrode fingers is disposed between two adjacent Type 1 electrode fingers among the plurality of Type 1 electrode fingers, and in a first IDT and a second IDT included in the plurality of IDTs to be adjacent to each other, one Type 1 electrode finger of the second IDT is disposed between two Type 1 electrode fingers of the first IDT. Accordingly, it is possible to provide a DMS filter capable of improving the amount of attenuation in an attenuation band adjacent to the wide band side for the passband and miniaturizing a product by saving space.

An acoustic wave filter device includes a plurality of acoustic wave resonators. Each of the acoustic wave resonators includes a piezoelectric layer and an IDT electrode provided on the piezoelectric layer. On a surface opposite to a surface of the piezoelectric layer on which the IDT electrode is provided, a low-acoustic-velocity film and a substrate made of a semiconductor are stacked. A routing line electrically connected to an antenna terminal is provided on an insulating film provided on the piezoelectric layer.

Acoustic wave devices and interdigital transducer (IDT) arrangements for surface acoustic wave (SAW) devices are disclosed. Representative SAW devices are described herein that provide sharp transitions between passband frequencies and frequencies that are outside of desired passbands. A SAW device may include several IDTs arranged between reflective structures on a piezoelectric material and one or more additional IDTs or electrode pairs that are configured to modify the influence of parasitic capacitance, or other internal device capacitance, thereby improving steepness on the upper side of a passband as well as improving rejection for frequencies outside of the passband. The one or more additional IDTs or electrode pairs may be configured as at least one of a capacitor, an IDT capacitor, an IDT with a floating electrode, or combinations thereof.

A surface acoustic wave device includes a piezoelectric substrate, a supportive layer, a cover layer and a pillar bump. The supportive layer is disposed on the piezoelectric substrate and around a transducer, the cover layer covers the supportive layer, and the pillar bump is located in a lower via hole of the supportive layer and an upper via hole of the cover layer. The upper via hole has a lateral opening located on a lateral surface of the cover layer, and the pillar bump in the cover layer protrudes from the lateral surface of the cover layer via the lateral opening.

A method of fabricating a bonded wafer with low carrier lifetime in silicon comprises providing a silicon substrate having opposing top and bottom surfaces, modifying a top portion of the silicon substrate to reduce carrier lifetime in the top portion relative to the carrier lifetime in portions of the silicon substrate other than the top portion, bonding a piezoelectric layer having opposing top and bottom surfaces separated by a distance T over the top surface of the silicon substrate, and providing a pair of electrodes having fingers that are inter-digitally dispersed on a top surface of the piezoelectric layer, the electrodes comprising a portion of a Surface Acoustic Wave (SAW) device. The modifying and bonding steps may be performed in any order. The modified top portion of the silicon substrate prevents the creation of a parasitic conductance within that portion during operation of the SAW device.