A method and apparatus are provided for controlling a drive terminal of a power transistor by applying a turn-off voltage to the drive terminal at a turn-off time, measuring a gate current at the drive terminal to detect a predetermined gate current slope, determining a first time increment after the turn-off time when the predetermined gate current slope is detected, determining a second time increment which is proportional to the first time increment and which expires within a Miller plateau for the power transistor, and lowering the gate current at the drive terminal to a predetermined current level upon expiration of the second time increment in order to reduce overvoltages at the power transistor.

A semiconductor device according to an embodiment includes a normally-off transistor having a first source, a first drain, and a first gate; a normally-on transistor having a second source electrically connected to the first drain, a second drain, and a second gate, a capacitor having a first end and a second end, the second end being electrically connected to the second gate, a first diode having a first anode electrically connected between the second end and the second gate and having a first cathode electrically connected to the second source, a first resistor provided between the first end and the first gate, and a second diode having a second anode electrically connected to the first end and having a second cathode electrically connected to the first gate, the second diode being provided in parallel with the first resistor.

A terminal protection voltage detector circuit is provided for protecting a terminal block having output terminals in a power supply apparatus. A current detector detects output currents flowing from the power supply apparatus to loads via output terminals, and a first comparator configured to compare a sum of the detected output currents with a predetermined first threshold and output a first comparison result signal when the sum of output currents is larger than or equal to the first threshold. A second comparator configured to compare a maximum value of detected output currents with a predetermined second threshold and output a second comparison result signal when the maximum value is equal to or larger than the second threshold. A current stop circuit stops a current from flowing from the power supply apparatus to the output terminals based on the first or second comparison result signal.

A switch device includes an output transistor, an overcurrent protection circuit configured to be capable of performing an overcurrent protection operation in which magnitude of target current flowing in the output transistor is limited to a predetermined upper limit current value or less, and a control circuit configured to be capable of controlling a state of the output transistor and capable of changing the upper limit current value among a plurality of current values including a predetermined first current value and a predetermined second current value less than the first current value. The control circuit can limit the magnitude of the target current to the first current value or less in response to the magnitude of the target current reaching the first current value, and then change the upper limit current value to the second current value.

A programmable or configurable non-contact solid state switch device and method are provided for emulating a high reliability switch. The switch device senses position information related to a switch and is calibrated using a learning operation to learn position information of mechanical features of the switch and to map the positions of these features. Electrical outputs or functions are assigned to the mapped positions and stored such that the switch device generates the outputs when their corresponding positions are sensed. A switch device is uniquely configured to the mechanical system in which it operates.

A signal detection circuit includes: a voltage dividing circuit having at least a first pair of voltage dividing capacitors connected in series for dividing an input voltage and configured to output a divided voltage, and a detection circuit configured to detect the divided voltage. The first pair of voltage dividing capacitors are included in one semiconductor device. The semiconductor device includes: (i) a semiconductor substrate, (ii) a first conductor layer, (iii) a first dielectric layer, (iv) a second conductor layer, (v) a second dielectric layer, (vi) a third conductor layer, and (vii) a short-circuit portion configured to short-circuit the first conductor layer and the semiconductor substrate.

Fin field-effect transistor (FinFET) thyristors for protecting high-speed communication interfaces are provided. In certain embodiments herein, high voltage tolerant FinFET thyristors are provided for handling high stress current and high RF power handling capability while providing low capacitance to allow wide bandwidth operation. Thus, the FinFET thyristors can be used to provide electrical overstress protection for ICs fabricated using FinFET technologies, while addressing tight radio frequency design window and robustness. In certain implementations, the FinFET thyristors include a first thyristor, a FinFET triggering circuitry and a second thyristor that serves to provide bidirectional blocking voltage and overstress protection. The FinFET triggering circuitry also enhances turn-on speed of the thyristor and/or reduces total on-state resistance.

A voltage level-shifting circuit for an integrated circuit includes an input terminal receiving a voltage signal referenced to an input/output (PO) voltage level. A transistor overvoltage protection circuit includes a first p-type metal oxide semiconductor (PMOS) transistor includes a source coupled to the second voltage supply, a gate receiving an enable signal, and a drain connected to a central node. A first n-type metal oxide semiconductor (NMOS) transistor includes a drain connected to the central node, a gate connected to the input terminal, and a source connected to an output terminal. A second NMOS transistor includes a drain connected to the input terminal, a gate connected to the central node, and a source connected to the output terminal.

A resistance device (100) includes a field-effect transistor (TN) and a voltage applying circuit (1). The voltage applying circuit (1) applies a control voltage (Vgs) between the gate and source of the field-effect transistor (TN) according to a temperature (T) to control a resistance value (R) between the drain and source of the field-effect transistor (TN). The control voltage (Vgs) is a voltage obtained by adding a correction voltage (Vc) to a reference voltage (Vgs0). The correction voltage (Vc) depends on the temperature (T) and is set to be zero at a first temperature (T1).

A bidirectional switch fault protection circuit includes a bidirectional switch circuit, a desaturation detection circuit, and a gate driver. The bidirectional switch circuit generates first and second switch voltages based on a direction of electric current. The desaturation detection circuit outputs the first switch voltage in response to the electric current flowing in a first direction and outputs the second switch voltage in response to the electric current flowing in a second direction opposite the first direction. The gate driver receives the first switch voltage in response to the electric current flowing in the first direction and the second switch voltage in response to the electric current flowing in the second direction. The gate driver detects a first short circuit condition based on the first switch voltage and a second short circuit condition based on the second switch voltage.