Patent classifications
H03K17/102
Active rectifier circuit with reduced complexity and reduced component count
A rectifier circuit has one or more bridge circuits each with: a first leg with two diodes in series and an AC terminal at a midpoint between the two, a second leg with two semiconductor switches in parallel to the first, a third diode connected to a upper node of each leg, a fourth diode connected to a lower node of each leg, and a capacitor leg with two capacitors in series between the third and fourth diode. A midpoint between the capacitors is connected to a midpoint between the semiconductor switches. The first arrangement is two controllable semiconductor switches in series. A gate node of the second is connected to a first load terminal of the first switch and the first load terminal is connected to the lower node. The second semiconductor switch is a third controllable semiconductor switch with a gate node connected to the lower node.
HIGH-VOLTAGE SEMICONDUCTOR SWITCH
A high-voltage semiconductor switch is provided. The high-voltage semiconductor switch comprises one or more switch subcircuits, wherein each switch subcircuit may comprise one or more FET circuits and voltage-shifting transistor. The high-voltage semiconductor switch may be configured based on operational and environmental requirements, such as those of a quantum computing system, wherein the high-voltage switch may be located in a cryostat or vacuum chamber.
Transmit receive radio frequency switch
A TX/RX RF switch that may include a reception path; and a transmission path that has an antenna port, a transmission input port, and transmission transistors. The transmission transistors have source-bulk connections. The reception path has an antenna port, a reception output port, and reception transistors. The reception path includes a first reception transistor that is closest to the antenna port, out of the reception transistors, and has a source-bulk connection, and at least one other reception transistor that has a bulk-to-ground connection. The reception transistors and the transmission transistors are CMOS transistors.
Circuit and method for controlling charge injection in radio frequency switches
A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors. A method for controlling charge injection in a switch circuit is disclosed whereby injected charge is generated at resistively-isolated nodes between series coupled switching transistors, and the injected charge is conveyed to at least one node of the switch circuit that is not resistively-isolated.
Efficient switching circuit
An apparatus includes a first leg having a plurality of transistors connected in series between a first node and a second node. Each of the plurality of transistors includes a respective body diode. The apparatus further includes a second leg connected between the first node and the second node and in parallel to the series connection of the plurality of transistors of the first leg. The second leg includes a first transistor. The second leg has lower reverse recovery losses relative to the first leg.
CONVERTER OUTPUT STAGE WITH BIAS VOLTAGE GENERATOR
A buck voltage converter is disclosed. The buck voltage generator includes a controller configured to generate one or more pulse width modulation (PWM) signals, and a plurality of serially connected switches configured to receive the PWM signals and to generate an output voltage signal at an output terminal based on the received PWM signals. The output voltage signal has an average voltage corresponding with a duty cycle of the PWM signals, a first switch of the plurality of serially connected switches has a first breakdown voltage and a second switch of the plurality of serially connected switches has a second breakdown voltage, and the first breakdown voltage is less than the second breakdown voltage.
RF switch having independently generated gate and body voltages
In some method and apparatus embodiments, an RF circuit comprises a switch transistor having a source, a drain, a gate, and a body. A gate control voltage is applied to the gate of the switch transistor. A body control voltage is applied to the body of the switch transistor. The body control voltage is a positive bias voltage when the switch transistor is in an on state. In some embodiments, an RF circuit comprises a control voltage applied to the gate of the switch transistor through a first resistance and applied to the body of the switch transistor through a second resistance. The first resistance is different from the second resistance.
Cascode semiconductor device and method of manufacture
This disclosure relates to a discrete cascode semiconductor device and associated method of manufacture, the device includes: a high voltage depletion mode device die having gate, source and drain terminals arranged on a first major surface thereof; a low voltage enhancement mode device die having a gate and a source terminal formed on a first major surface thereof, and a drain terminal formed on a second major surface opposite the first major surface. The drain terminal of the high voltage device die is mounted on a drain connection; the source terminal of the low voltage device die and the gate terminal of the high voltage device are mounted on a common source connection; and the drain terminal of the low voltage device die is mounted on the source terminal of the high voltage device.
AC-DC CONVERTER CIRCUIT
There is provided an AC-DC converter circuit (100) for high power charging of an electrical battery. The circuit comprises an input rectifier comprising a first node and a second node. The input rectifier (110) is configured to receive an AC voltage at the first node (112) and provide a rectified voltage at the second node (114). The circuit further comprises a first transistor (120), comprising a first gate node (122), a first source node (124), and a first drain node (126). The first drain node is connected to the second node of the input rectifier. The first gate node is connected to a ground node (170). The circuit further comprises a second transistor (130), comprising a second gate node (132), a second source node (134), and a second drain node (136). The second drain node is connected to the first source node. The second transistor materially corresponds to the first transistor. The circuit further comprises a duty cycle control unit (140) connected to the second gate node for providing the second transistor with a switching waveform. The circuit further comprises an output rectifier (150) connected to the second source node or the first source node. The circuit further comprises an output electronic filter (160) connected to the second source node or an output node (151) of the output rectifier. An AC-DC converter device, a method for charging an electrical battery, and a regenerative braking system is also provided.
Driving Method and Driving Circuit
A driving circuit and a driving method are provided. According to embodiments of the present disclosure, a power switch is driven by constant voltage or constant current during different time periods. The power switch is driven by using a first driving current during a Miller platform period, and the power switch is driven by using a second driving current when the Miller platform period ends, where the first driving current is less than the second driving current, so as to optimize EMI, reduce loss and improve efficiency.