An integrated circuit includes a signal output circuit configured to output a timing signal indicating first and second timings of respectively switching first and second switching devices, first and second hold circuits respectively configured to receive first and second voltages corresponding to temperatures of the first and second switching devices, hold the first and second voltages for first and second time periods, and output the received first and second voltages in response to the first and second time periods having elapsed, and first and second control circuits respectively configured to control switching of the first and second switching devices with first and second driving capabilities corresponding to the temperatures of the first and second switching devices, based on the first and second voltages outputted from the first and second hold circuits and first and second driving signals for driving the first and second switching device.

Provided are embodiments for determining solenoid plunger position by performing a method which includes generating, by a first signal circuit, a first signal based at least in part on a pull-in current value of a current applied to a solenoid coil of a solenoid. The method further includes generating, by a second signal circuit, a second signal by applying a time delay to the first signal. The method further includes comparing, by a comparator circuit, the first signal and the second signal to determine whether a plunger of the solenoid has moved within the solenoid from a first position to a second position. The method further includes, responsive to determining that the plunger of the solenoid has moved within the solenoid from the first position to the second position, reducing the current applied to the solenoid coil of the solenoid from the pull-in current value to a hold current value.

A switched emitter follower circuit is constituted by a transistor in which a base is connected to a signal input terminal, a power voltage is applied to a collector, and an emitter is connected to a signal output terminal, a capacitor in which one end is connected to the collector of the transistor, and the other end is connected to the emitter of the transistor, and a Gilbert-cell type multiplication circuit in which a positive-phase clock output terminal is connected to the emitter of the transistor, a negative-phase clock output terminal is connected to the base of the transistor, and a multiplication result of a differential clock signal and a differential clock signal input from an outside is output to the positive-phase clock output terminal and the negative-phase clock output terminal.

A switched emitter follower circuit is constituted by a transistor in which a base is connected to a signal input terminal, a power voltage is applied to a collector, and an emitter is connected to a signal output terminal, a capacitor in which one end is connected to the collector of the transistor, and the other end is connected to the emitter of the transistor, and a Gilbert-cell type multiplication circuit in which a positive-phase clock output terminal is connected to the emitter of the transistor, a negative-phase clock output terminal is connected to the base of the transistor, and a multiplication result of a differential clock signal and a differential clock signal input from an outside is output to the positive-phase clock output terminal and the negative-phase clock output terminal.

A reference voltage buffer circuit includes an operational amplifier, a capacitor switching module, a first transistor and a second transistor. The operational amplifier includes two input terminals and an output terminal, where the two input terminals receive an input reference voltage and a feedback voltage, respectively. A gate electrode of the first transistor is coupled to the capacitor switching module, and a source electrode of the first transistor provides the feedback voltage. A gate electrode of the second transistor is coupled to the capacitor switching module, and a source electrode of the second transistor provides an output reference voltage. In addition, the operational amplifier generates a stable control voltage to the gate electrodes of the first transistor and the second transistors via the capacitor switching module while the output terminal of the operational amplifier is not directly connect to the gate electrodes of the first transistor and the second transistors.

A reference voltage buffer circuit includes an operational amplifier, a capacitor switching module, a first transistor and a second transistor. The operational amplifier includes two input terminals and an output terminal, where the two input terminals receive an input reference voltage and a feedback voltage, respectively. A gate electrode of the first transistor is coupled to the capacitor switching module, and a source electrode of the first transistor provides the feedback voltage. A gate electrode of the second transistor is coupled to the capacitor switching module, and a source electrode of the second transistor provides an output reference voltage. In addition, the operational amplifier generates a stable control voltage to the gate electrodes of the first transistor and the second transistors via the capacitor switching module while the output terminal of the operational amplifier is not directly connect to the gate electrodes of the first transistor and the second transistors.

A device for switching a high-voltage source, comprising: a plurality of switching devices coupled in series starting from a first switching device and ending in a last switching device, said device enabling coupling of said high-voltage source with at least a selected one of said switching devices; a voltage limiter coupled with said switching devices; and a switching time synchronizer; wherein said first switching device is configured to directly receive a control signal for changing a switching state of said device, said first switching device is configured to facilitate a cascaded transition of switching states in successive said switching devices in said series, where said switching time synchronizer is configured to synchronize a time at which transitions to said switching states of successive said switching devices take effect, and said voltage limiter is configured to limit overvoltage conditions to said switching devices during said transitions.

A device for switching a high-voltage source, comprising: a plurality of switching devices coupled in series starting from a first switching device and ending in a last switching device, said device enabling coupling of said high-voltage source with at least a selected one of said switching devices; a voltage limiter coupled with said switching devices; and a switching time synchronizer; wherein said first switching device is configured to directly receive a control signal for changing a switching state of said device, said first switching device is configured to facilitate a cascaded transition of switching states in successive said switching devices in said series, where said switching time synchronizer is configured to synchronize a time at which transitions to said switching states of successive said switching devices take effect, and said voltage limiter is configured to limit overvoltage conditions to said switching devices during said transitions.

A switched emitter follower circuit is constituted by a transistor in which a base is connected to a signal input terminal, a power voltage is applied to a collector, and an emitter is connected to a signal output terminal, a capacitor in which one end is connected to the collector of the transistor, and the other end is connected to the emitter of the transistor, and a Gilbert-cell type multiplication circuit in which a positive-phase clock output terminal is connected to the emitter of the transistor, a negative-phase clock output terminal is connected to the base of the transistor, and a multiplication result of a differential clock signal and a differential clock signal input from an outside is output to the positive-phase clock output terminal and the negative-phase clock output terminal.

A switched emitter follower circuit is constituted by a transistor in which a base is connected to a signal input terminal, a power voltage is applied to a collector, and an emitter is connected to a signal output terminal, a capacitor in which one end is connected to the collector of the transistor, and the other end is connected to the emitter of the transistor, and a Gilbert-cell type multiplication circuit in which a positive-phase clock output terminal is connected to the emitter of the transistor, a negative-phase clock output terminal is connected to the base of the transistor, and a multiplication result of a differential clock signal and a differential clock signal input from an outside is output to the positive-phase clock output terminal and the negative-phase clock output terminal.