A fluctuating oscillator includes: an adder that has an input terminal to which an input signal including a main signal and an uncorrelated signal that is uncorrelated with the main signal and is higher in frequency than the main signal is input, and adds a feedback signal to the input signal; a threshold discrimination unit that generates a pulse signal by comparing an addition signal added by the adder with a threshold; a transient response unit that generates an output signal by transiently responding the generated pulse signal; and a feedback loop that feeds back the output signal to the adder as the feedback signal.

A fluctuating oscillator includes: an adder that has an input terminal to which an input signal including a main signal and an uncorrelated signal that is uncorrelated with the main signal and is higher in frequency than the main signal is input, and adds a feedback signal to the input signal; a threshold discrimination unit that generates a pulse signal by comparing an addition signal added by the adder with a threshold; a transient response unit that generates an output signal by transiently responding the generated pulse signal; and a feedback loop that feeds back the output signal to the adder as the feedback signal.

A comparison circuit that includes an input sampling capacitor and an image sensor including the same are provided. The comparison circuit includes an amplifier configured to receive a pixel signal and a ramp signal to perform a correlated double sampling operation, a first pixel capacitor connected to the amplifier through a first floating node and configured to transmit the pixel signal, a first ramp capacitor connected to the amplifier through a second floating node and configured to transmit the ramp signal, a second pixel capacitor connected in parallel to the first pixel capacitor, and a second ramp capacitor connected in parallel to the first ramp capacitor, wherein the second pixel capacitor is formed between the first floating node and first peripheral routing lines, and the second ramp capacitor is formed between the second floating node and second peripheral routing lines.

A comparison circuit that includes an input sampling capacitor and an image sensor including the same are provided. The comparison circuit includes an amplifier configured to receive a pixel signal and a ramp signal to perform a correlated double sampling operation, a first pixel capacitor connected to the amplifier through a first floating node and configured to transmit the pixel signal, a first ramp capacitor connected to the amplifier through a second floating node and configured to transmit the ramp signal, a second pixel capacitor connected in parallel to the first pixel capacitor, and a second ramp capacitor connected in parallel to the first ramp capacitor, wherein the second pixel capacitor is formed between the first floating node and first peripheral routing lines, and the second ramp capacitor is formed between the second floating node and second peripheral routing lines.

A motor controller comprises a switch circuit, a control unit, and a duty cycle processing unit. The switch circuit is coupled to a motor for driving the motor. The control unit is configured to generate a plurality of control signals to control the switch circuit. The duty cycle processing unit receives a first pulse width modulation signal, where the first pulse width modulation has a first duty cycle. The duty cycle processing unit is configured to judge if the first duty cycle is equal to 0% or 100%. The duty cycle processing unit comprises a duty cycle computing unit, where the duty cycle computing unit is configured to capture the first duty cycle.

A current mode control modulation includes a ramp signal generator generating a slope compensated ramp signal with slope compensation. In some embodiments, the ramp signal generator generates a ramp signal for the current control loop having a first ramp portion with slope compensation and a second ramp portion that matches the expected current mode signal. In some embodiments, the ramp signal generator includes a switched capacitor circuit supplied by a current circuit to charge or discharge nodes in the switched capacitor circuit to generate the ramp signal with slope compensation.

A current mode control modulation includes a ramp signal generator generating a slope compensated ramp signal with slope compensation. In some embodiments, the ramp signal generator generates a ramp signal for the current control loop having a first ramp portion with slope compensation and a second ramp portion that matches the expected current mode signal. In some embodiments, the ramp signal generator includes a switched capacitor circuit supplied by a current circuit to charge or discharge nodes in the switched capacitor circuit to generate the ramp signal with slope compensation.

A microwave generator includes a power supply, an output circuit, a feedback oscillator, a pulse controller, a signal combination circuit and a semiconductor amplifier. The power supply converts input voltage and input current into output voltage and output current. The output circuit generates a microwave signal to an output terminal of the microwave generator and a feedback signal according to the microwave signal. The feedback oscillator generates an oscillation signal according to the feedback signal. According to a reference signal, the pulse controller generates a pulse signal. According to the oscillation signal and pulse signal, the signal combination circuit generates a control signal. The semiconductor amplifier generates and adjusts an amplified signal according to the control signal. The output circuit generates the microwave signal according to the amplified signal. The output current is adjusted according to the amplified signal. Consequently, the input current and the input voltage are in phase.

A duty point detection circuit receiving an input signal and generating an output signal includes a charge pump receiving the input signal and the output signal and generating a comparison target signal from the input signal and the output signal, a magnitude of the comparison target signal being determined based on a first duty ratio of the input signal and a second duty ratio of the output signal, a comparator receiving a reference signal and the comparison target signal, and comparing the reference signal and the comparison target signal to generate a comparison result signal, and a control circuit receiving the input signal and the comparison result signal and adjusting the second duty ratio of the output signal to a constant duty ratio in successive cycle periods of the input signal.

A duty point detection circuit receiving an input signal and generating an output signal includes a charge pump receiving the input signal and the output signal and generating a comparison target signal from the input signal and the output signal, a magnitude of the comparison target signal being determined based on a first duty ratio of the input signal and a second duty ratio of the output signal, a comparator receiving a reference signal and the comparison target signal, and comparing the reference signal and the comparison target signal to generate a comparison result signal, and a control circuit receiving the input signal and the comparison result signal and adjusting the second duty ratio of the output signal to a constant duty ratio in successive cycle periods of the input signal.