The present disclosure provides an analog readout preprocessing circuit for a CMOS image sensor and a control method thereof. The analog readout preprocessing circuit comprises an extended count-type integration cycle-successive approximation hybrid analog-to-digital conversion capacitor network 1 configured to achieve readout and analog-to-digital conversion of signals output from the CMOS image sensor; an operational amplifier configured to utilize “virtual short” of two input terminals of the operational amplifier and the charge conservation principle, to achieve a function of extended count-type integration cycle-successive approximation hybrid analog-to-digital conversion, where the extended count-type integration can effectively reduce a thermal noise and a flicker noise within the image sensor; a comparator configured to compare voltages at two terminals to achieve a function of quantization of signals; and a control signal generator configured to provide control signals.

The present disclosure provides an analog readout preprocessing circuit for a CMOS image sensor and a control method thereof. The analog readout preprocessing circuit comprises an extended count-type integration cycle-successive approximation hybrid analog-to-digital conversion capacitor network 1 configured to achieve readout and analog-to-digital conversion of signals output from the CMOS image sensor; an operational amplifier configured to utilize “virtual short” of two input terminals of the operational amplifier and the charge conservation principle, to achieve a function of extended count-type integration cycle-successive approximation hybrid analog-to-digital conversion, where the extended count-type integration can effectively reduce a thermal noise and a flicker noise within the image sensor; a comparator configured to compare voltages at two terminals to achieve a function of quantization of signals; and a control signal generator configured to provide control signals.

An embodiment includes an analog-to-digital converter device. A device may include a first track and hold amplifier configured to receive an analog input signal. The device may also include a plurality of paths coupled to an output of the first track and hold amplifier. Each path of the plurality of paths includes a second track and hold amplifier coupled to the first track and hold amplifier, and a successive approximation register analog-to-digital converter coupled to an output of the second track and hold amplifier. The successive-approximation analog-to-digital converter may include heterojunction bipolar transistors, a comparator, R-2R DAC, and a SiGe BiCMOS quasi-CML SAR register and sequencer.

A multiplexing device for a digital-to-analog conversion circuit and an analog-to-digital conversion circuit in a storage and calculation integrated chip, comprising a digital-to-analog conversion circuit (DAC) module, an analog vector-matrix multiplication operation circuit(AMAC) module, an analog-to-digital conversion circuit(ADC) module, a first many-to-one multiplexer (M1-MUX) module, a second M1-MUX module, a first one-to-many multiplexer (1M-MUX) module, a second 1M-MUX module, and a switching transistor module. At an AMAC input end, each DAC corresponds to a plurality of input ends and is shared with the first 1M-MUX module in a time multiplexing mode by means of the first M1-MUX module; at an AMAC output end, each ADC corresponds to a plurality of output ends, and is shared with the second 1M-MUX module in a time multiplexing mode by means of the second M1-MUX module; the number of DACs and ADCs is reduced, and the chip area is reduced.

A multiplexing device for a digital-to-analog conversion circuit and an analog-to-digital conversion circuit in a storage and calculation integrated chip, comprising a digital-to-analog conversion circuit (DAC) module, an analog vector-matrix multiplication operation circuit(AMAC) module, an analog-to-digital conversion circuit(ADC) module, a first many-to-one multiplexer (M1-MUX) module, a second M1-MUX module, a first one-to-many multiplexer (1M-MUX) module, a second 1M-MUX module, and a switching transistor module. At an AMAC input end, each DAC corresponds to a plurality of input ends and is shared with the first 1M-MUX module in a time multiplexing mode by means of the first M1-MUX module; at an AMAC output end, each ADC corresponds to a plurality of output ends, and is shared with the second 1M-MUX module in a time multiplexing mode by means of the second M1-MUX module; the number of DACs and ADCs is reduced, and the chip area is reduced.

The present disclosure describes a computer using a combination of analogue and digital components/elements used in a cohesive manner. Depending on the signals and data the computer manipulates, the analog processing elements and digital processing elements can be used separately, independently or in combination to optimize the computational results and the performance of the computer.

The present disclosure describes a computer using a combination of analogue and digital components/elements used in a cohesive manner. Depending on the signals and data the computer manipulates, the analog processing elements and digital processing elements can be used separately, independently or in combination to optimize the computational results and the performance of the computer.

The present invention relates generally to the field of microphones, and more particularly to a microphone including an analog port and a digital port through which audio may be output. The microphone may be configured to obtain power from a host device and may include circuitry for selectively routing audio signals to the one or more ports. Advantageously, the microphone may be configured to connect with a variety of host devices and may facilitate functioning as a USB microphone via the digital port, while the analog port may be used as a headphone output

The present invention relates generally to the field of microphones, and more particularly to a microphone including an analog port and a digital port through which audio may be output. The microphone may be configured to obtain power from a host device and may include circuitry for selectively routing audio signals to the one or more ports. Advantageously, the microphone may be configured to connect with a variety of host devices and may facilitate functioning as a USB microphone via the digital port, while the analog port may be used as a headphone output

A time-to-digital converter (TDC) uses voltage as a representation of time offset. A voltage change is induced over a time period from a start signal to a stop signal. The final voltage is then measured, and the voltage measurement is mapped to a time value representing the time between the start signal and the stop signal. The voltage change can be increasing or decreasing, e.g., by charging or discharging a capacitive circuit between the start signal and the stop signal. The voltage can be measured using an analog-to-digital converter (ADC) or other voltage measurement circuit. The voltage measurement can be mapped to the time value in any manner, such as, for example, using a transfer function or using a mapping table that provides a time value for each possible voltage measurement value.