Patent classifications
H03M13/036
Systems and methods for artificial intelligence discovered codes
Systems and methods for artificial intelligence discovered codes are described herein. A method includes obtaining received samples from a receive decoder, obtaining decoded bits from the receive decoder based on the receiver samples, training an encoder neural network of a transmit encoder, the encoder neural network receiving parameters that comprise the information bits, the received samples, and the decoded bits. The encoder neural network is optimized using a loss function applied to the decoded bits and the information bits to calculate a forward error correcting code.
Low density parity check encoder having length of 16200 and code rate of 3/15, and low density parity check encoding method using the same
A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 16200 and a code rate of 3/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
Transmission device, transmission method, reception device, and reception method
A transmission device, a transmission method, a reception device, and a reception method for securing good communication quality in data transmission using an LDPC code. The LDPC coding is performed using a parity check matrix with the code length N of 17280 bits and the coding rate r of 13/16 or 14/16. The LDPC code includes information bits and parity bits, and the parity check matrix includes an information matrix portion corresponding to the information bits and a parity matrix portion corresponding to the parity bits. The information matrix portion is represented by a parity check matrix initial value table, and the parity check matrix initial value table is a table representing positions of elements of 1 of the information matrix for every 360 columns.
Transmission method and reception device
The present technology relates to a transmission method and a reception device for securing favorable communication quality in data transmission using an LDPC code. In group-wise interleaving, the LDPC code with a code length N of 17280 bits is interleaved in units of 360-bit bit groups 0 to 47. In group-wise deinterleaving, a sequence of the LDPC code after group-wise interleaving is returned to an original sequence. The present technology can be applied, for example, in a case of performing data transmission using an LDPC code, and the like.
TRANSMITTING APPARATUS AND SIGNAL PROCESSING METHOD THEREOF
A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding, an interleaver configured to interleave the LDPC codeword, and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver performs interleaving by dividing the LDPC codeword into a plurality of groups, rearranging an order of the plurality of groups in group units, and dividing the plurality of rearranged groups based on a modulation order according to the modulation method.
Multi-Rate ECC Parity For Fast SLC Read
A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to create a dual parity matrix. The dual parity matrix includes a full parity form that includes a payload, a first parity portion, and a second parity portion and a reduced parity form that includes the payload and the first parity portion. The second parity portion is 0. The controller is further configured to create an incremental parity construction matrix. The incremental parity construction matrix includes two arrays. A first array includes a first payload portion, a first, first parity portion, and a first, second parity portion and a second array includes a second payload portion, a second, first parity portion, and a second, second parity portion. The incremental parity construction matrix is arranged in either a block triangular construction or a block diagonal construction.
Shift values for quasi-cyclic LDPC codes
According to some embodiments, a method use in a wireless transmitter of a wireless communication network comprises encoding information bits using a parity check matrix (PCM) and transmitting the encoded information bits to a wireless receiver. The parity check matrix (PCM) is optimized according to two or more approximate cycle extrinsic message degree (ACE) constraints. In some embodiments, a that portion of the PCM is optimized according to a first ACE constraint and a second portion of PCM is optimized according to a second ACE constraint.
Data processing device and data processing method
The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code in which a code length N is 16200 bits and an encoding rate r is 10/15 or 12/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of the LDPC code that has undergone the group-wise interleave is restored to an original sequence. For example, the present technology can be applied to a technique of performing data transmission using an LDPC code.
MEMORY AND OPERATION METHOD OF MEMORY
A memory includes a first check matrix calculation circuit suitable for generating a first parity by calculating a group indicator portion of a check matrix and a write data; a memory core suitable for storing the write data and the first parity; a first syndrome calculation circuit suitable for generating a first syndrome by adding the first parity which is read from the memory core to a first calculation result obtained by calculating the group indicator portion and the data which is read from the memory core; and a failure determination circuit suitable for accumulating the first syndromes for a region of the memory core to generate a vector and determining a presence of a failure of the region based on the vector.
Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals
The present invention provides an apparatus of transmitting broadcast signals. The apparatus includes, an encoder for encoding service data, a bit interleaver for bit interleaving the encoded service data, a mapper for mapping the bit interleaved service data into a plurality of OFDM (Orthogonal Frequency Division Multiplex) symbols to build at least one signal frame, an OFDM modulator for modulating data in the built at least one signal frame by an OFDM scheme and a transmitter for transmitting the broadcast signals having the modulated data.