H03M13/093

Data storage device and non-volatile memory control method
11218164 · 2022-01-04 · ·

Uncorrectable (UNC) marking on a non-volatile memory is provided. In response to a UNC marking command issued by a host, a cyclic redundancy check (CRC) engine provides a specific CRC code to mark a logical address segment as uncorrectable, wherein the logical address segment is requested to be marked as uncorrectable by the UNC marking command. As long as the specific CRC code is recognized, a CRC procedure is not required and the data requested by the host is directly determined as uncorrectable.

Incremental cyclic redundancy (CRC) process
11652571 · 2023-05-16 · ·

Performing a constant time cyclic redundancy check (CRC) over an entire packet to obtain a constant time CRC value. A first CRC is performed on an original header of the packet and a second CRC is performed on a modified header of the packet. The size of the payload of the packet is obtained. An XOR operation is performed on the results of the first and second CRC to calculate a third result. An intermediate CRC value is obtained by performing a CRC on a number of zero values corresponding to the size of the payload using the third result as an initial value. The intermediate CRC value may be employed with other packets having a same size and same header as the packet. The constant time CRC value is obtained by performing an XOR operation on the intermediate CRC value and the original CRC value contained in the packet.

PERFORMING A CYCLIC REDUNDANCY CHECKSUM OPERATION RESPONSIVE TO A USER-LEVEL INSTRUCTION
20220091926 · 2022-03-24 ·

In one embodiment, the present invention includes a method for receiving incoming data in a processor and performing a checksum operation on the incoming data in the processor pursuant to a user-level instruction for the checksum operation. For example, a cyclic redundancy checksum may be computed in the processor itself responsive to the user-level instruction. Other embodiments are described and claimed.

TECHNOLOGIES FOR APPLYING A REDUNDANCY ENCODING SCHEME TO SEGMENTED NETWORK PACKETS

Technologies for applying a redundancy encoding scheme to segmented portions of a data block include an endpoint computing device communicatively coupled to a destination computing device. The endpoint computing device is configured to divide a block of data into a plurality of data segments as a function of a transmit window size and a redundancy encoding scheme, and generate redundant data usable to reconstruct each of the plurality of data segments. The endpoint computing device is additionally configured to format a series of network packets that each includes a data segment of the plurality of data segments and generated redundant data for at least one other data segment of the plurality of data segments. Further, the endpoint computing device is configured to transport each of the series of network packets to a destination computing device. Other embodiments are described herein.

Technologies for applying a redundancy encoding scheme to segmented network packets

Technologies for applying a redundancy encoding scheme to segmented portions of a data block include an endpoint computing device communicatively coupled to a destination computing device. The endpoint computing device is configured to divide a block of data into a plurality of data segments as a function of a transmit window size and a redundancy encoding scheme, and generate redundant data usable to reconstruct each of the plurality of data segments. The endpoint computing device is additionally configured to format a series of network packets that each includes a data segment of the plurality of data segments and generated redundant data for at least one other data segment of the plurality of data segments. Further, the endpoint computing device is configured to transport each of the series of network packets to a destination computing device. Other embodiments are described herein.

Performing a cyclic redundancy checksum operation responsive to a user-level instruction

In one embodiment, the present invention includes a method for receiving incoming data in a processor and performing a checksum operation on the incoming data in the processor pursuant to a user-level instruction for the checksum operation. For example, a cyclic redundancy checksum may be computed in the processor itself responsive to the user-level instruction. Other embodiments are described and claimed.

INTELLIGENT CONTROLLER AND SENSOR NETWORK BUS, SYSTEM AND METHOD INCLUDING AN ERROR AVOIDANCE AND CORRECTION MECHANISM
20210036806 · 2021-02-04 ·

A machine automation system for controlling and operating an automated machine. The system includes a controller and sensor bus including a central processing core and a multi-medium transmission intranet for implementing a dynamic burst to broadcast transmission scheme where messages are burst from nodes to the central processing core and broadcast from the central processing core to all of the nodes.

Object synchronization in a clustered system

A storage system in a clustered system may receive a first input/output (I/O) request. The storage system may include one or more storage nodes. Each of the one or more storage nodes may have a copy of a particular object stored thereon. The storage system may execute the first I/O request. Executing the first I/O request may modify data of a first object in a first storage node. The first object may be a copy of the particular object. The storage system may transfer the modified data of the first object to a master storage node. The master storage node may include a master object update descriptor list.

CRC UPDATE MECHANISM

A cyclic redundancy code (CRC) update device includes an input coupled to obtain an old CRC that corresponds to an old header of a communication packet, a CRC storage device to store CRC coefficients, a CRC calculator coupled to receive a modified old header of the communication packet and calculate a new CRC on the modified old header, and a polynomial multiplier coupled to the CRC storage device to receive the new CRC, obtain a corresponding coefficient from the CRC storage device, and generate an update for the CRC of the frame.

DATA STORAGE DEVICE AND NON-VOLATILE MEMORY CONTROL METHOD
20200412379 · 2020-12-31 ·

Uncorrectable (UNC) marking on a non-volatile memory is provided. In response to a UNC marking command issued by a host, a cyclic redundancy check (CRC) engine provides a specific CRC code to mark a logical address segment as uncorrectable, wherein the logical address segment is requested to be marked as uncorrectable by the UNC marking command. As long as the specific CRC code is recognized, a CRC procedure is not required and the data requested by the host is directly determined as uncorrectable.