Patent classifications
H03M13/1131
Method and apparatus for wirelessly communicating over a noisy channel with a variable codeword length polar code to improve transmission capacity
Systems and methods of communicating using asymmetric polar codes are provided which overcome the codeword length constraints of systems and methods of communicating that use traditional polar codes. Used herein, asymmetric polar codes refers to a polarizing linear block code of any arbitrary length that is constructed by connecting together constituent polar codes of unequal length. Asymmetric polar codes may be known by other names. In comparison to conventional solutions for variable codeword length, asymmetric polar codes may provide more flexibility, improved performance, and/or reduced complexity of decoding, encoding, or code design. The system and method provide a flexible, universal, and well-defined coding scheme and to provide sound bit-error correction performance and low decoding latency (compared with current length-compatible methods which can be used with current hardware designs). For the most part, the provided embodiments can be implemented with nearly all available current encoding/decoding polar code techniques.
Systems and Methods for Decoding of Graph-Based Channel Codes Via Reinforcement Learning
Embodiments of the present disclosure relate to sequential decoding of moderate length low-density parity-check (LDPC) codes via reinforcement learning (RL). The sequential decoding scheme is modeled as a Markov decision process (MDP), and an optimized cluster scheduling policy is subsequently obtained via RL. A software agent is trained to schedule all check nodes (CNs) in a cluster, and all clusters in every iteration. A new RL state space model is provided that enables the RL-based decoder to be suitable for longer LDPC codes.
CONCATENATED ERROR CORRECTING CODES
Systems and methods are provided for concatenated error-correcting coding. An apparatus may include a Low-Density Parity-Check (LDPC) decoder configured to perform an iterative LDPC decoding process on bits of an LDPC codeword, a Bose—Chaudhuri—Hocquenghem (BCH) decoder coupled to the LDPC decoder and a BCH scheduler coupled to the LDPC decoder and the BCH decoder. The LDPC codeword may be generated by LDPC encoding a Bose—Chaudhuri—Hocquenghem (BCH) codeword and the BCH codeword may be generated by BCH encoding a data unit. The BCH scheduler may be configured to determine whether a triggering condition for the BCH decoder is met after each iteration of the iterative LDPC decoding process and activate the BCH decoder to operate on an intermediate decoding result of the LDPC decoder if the triggering condition for the BCH decoder is met.
Data processing device
A data processing device includes a plurality of variable nodes configured to receive and store a plurality of target bits; a plurality of check nodes each configured to receive stored target bits from one or more corresponding variable nodes of the plurality of variable nodes, check whether received target bits have an error bit, and transmit a check result to the corresponding variable nodes; and a group state value manager configured to determine group state values of variable node groups into which the plurality of variable nodes are grouped.
Error floor performance of a bit flipping decoder through identifying unreliable check nodes
Techniques related to improving the error floor performance of a bit flipping (BF) decoder are described. In some examples, error floor performance is improved through determining a set of unreliable check nodes (CNs) and using information about the set of unreliable CNs to compute the flipping energies of variable nodes (VNs). In this manner, the flipping energies can be computed more accurately, thereby lowering the error floor. The set of unreliable CNs can be built through applying various criteria, such as criteria relating to the path length to an unsatisfied CN, the degree of a VN in a path to an unsatisfied CN, and/or checksum value. Path length and VN degree can be applied as selection criteria to determine which CNs qualify as members of the set of unreliable CNs. Checksum value can be applied as a trigger condition for building and/or using the set of unreliable CNs.
Method for optimizing protograph-based LDPC code over underwater acoustic channel
The present disclosure provides a method for optimizing a protograph-based LDPC code over an underwater acoustic (UAW) channel. The traditional protograph-based LDPC code over an UAW channel does not consider performance in an error floor region. The method first determines parameters such as a protograph-based LDPC code length, a basic protograph, a target decoding threshold, a threshold adjustment factor, and an ACE check parameter. The protograph is optimized, and the method constructs a parity check matrix by using a UAW channel-based PEG/ACE hybrid algorithm, performs ACE check on the parity check matrix, and calculates a decoding threshold for the matrix passing the check. If the decoding threshold is within a range of an iterative decoding threshold, the parity check matrix is a final optimized matrix. Otherwise, the method continues to optimize the protograph until a parity check matrix passing the check is obtained.
CONCATENATED ERROR CORRECTING CODES
Systems and methods are provided for concatenated error-correcting coding. An apparatus may include a Low-Density Parity-Check (LDPC) decoder configured to perform an iterative LDPC decoding process on bits of an LDPC codeword, a Bose-Chaudhuri-Hocquenghem (BCH) decoder coupled to the LDPC decoder and a BCH scheduler coupled to the LDPC decoder and the BCH decoder. The LDPC codeword may be generated by LDPC encoding a Bose-Chaudhuri-Hocquenghem (BCH) codeword and the BCH codeword may be generated by BCH encoding a data unit. The BCH scheduler may be configured to determine whether a triggering condition for the BCH decoder is met after each iteration of the iterative LDPC decoding process and activate the BCH decoder to operate on an intermediate decoding result of the LDPC decoder if the triggering condition for the BCH decoder is met.
LOW-DENSITY PARITY CHECK DECODING
A coded signal is received via a physical channel. The coded signal is encoded by a parity check matrix. In some examples, the coded signal is low density parity check-encoded. The coded signal is decoded to determine a result signal. Said decoding alternatingly updates, for each one of a number of iterations, bit node values representing bits of the result signal and check node values representing constrains of the parity check matrix. In some examples, the decoding determines the result signal at a first precision and updates at least partly at a second precision which is lower than the first precision. In further examples, the number of iterations is dynamically adjusted.
DECODING METHOD AND DECODER FOR LOW DENSITY PARITY CHECK CODE
A decoding method for low density parity check (LDPC) code, used to decode an input signal into a correct codeword according to a predetermined LDPC matrix, is provided. The method includes performing a plurality of decoding attempts according to the LDPC matrix within a predetermined number of decoding attempts, the plurality of decoding attempts at least including a first decoding attempt with use of a first decoding schedule and a second decoding attempt with use of a second decoding schedule. The second decoding attempt is adjacently subsequent to the first decoding attempt. The first decoding schedule as a group is not included in the second decoding schedule.
DECODING APPARATUS, DECODING METHOD, AND ELECTRONIC APPARATUS
There is provided a decoding apparatus for decoding a low density parity check (LDPC) code, wherein the decoding apparatus includes a memory a memory configured to store a scheduling table indicating a desired processing order of a plurality of rows included in a parity check matrix and a plurality of columns included in each of the rows of the parity check matrix, and processing circuitry configured to decode the LDPC code based on the scheduling table, the decoding including performing processing on at least one column included in a second scheduled row of the parity check matrix before processing of all columns included in a first scheduled row of the parity check matrix has been completed.