H03M13/27

Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 3/15 and quadrature phase shift keying, and bit interleaving method using same

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.

Decompression apparatus for decompressing a compressed artificial intelligence model and control method thereof

A decompression apparatus is provided. The decompression apparatus includes a memory configured to store compressed data decompressed and used in neural network processing of an artificial intelligence model, a decoder configured to include a plurality of logic circuits related to a compression method of the compressed data, decompress the compressed data through the plurality of logic circuits based on an input of the compressed data, and output the decompressed data, and a processor configured to obtain data of a neural network processible form from the data output from the decoder.

Transmitter and method for generating additional parity thereof

A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits to be transmitted in a current frame; a parity permutator configured to perform by group-wise interleaving a plurality of bit groups configuring the parity bits based on a group-wise interleaving pattern comprising a first pattern and a second pattern; a puncturer configured to puncture some of the parity-permutated parity bits; and an additional parity generator configured to select at least some of the punctured parity bits to generate additional parity bits to be transmitted in a previous frame of the current frame, based on the first pattern and the second pattern.

APPARATUS FOR TRANSMITTING BROADCAST SIGNALS, APPARATUS FOR RECEIVING BROADCAST SIGNALS, METHOD FOR TRANSMITTING BROADCAST SIGNALS AND METHOD FOR RECEIVING BROADCAST SIGNALS

The present invention provides a method of transmitting broadcast signals. The method includes, formatting input streams into Data Pipe (DP) data, Low-Density Parity-Check (LDPC) encoding the DP data according to a code rate, bit interleaving the LDPC encoded DP data, mapping the hit interleaved DP data onto constellations, building at least one signal frame including the mapped DP data, and modulating data in the built signal frame by an Orthogonal Frequency Division Multiplexing (OFDM) method and transmitting the broadcast signals having the modulated data, wherein the input streams include Audio/Video (A/V) data and service guide data, and wherein the Audio/Video (A/V) data and service guide data are included in first ISO base media file format (ISOBMFF) files.

BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 3/15 AND 64-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.

TRANSMITTING APPARATUS AND MAPPING METHOD THEREOF

A transmitting apparatus is disclosed. The transmitting apparatus includes an encoder to perform channel encoding with respect to bits and generate a codeword, an interleaver to interleave the codeword, and a modulator to map the interleaved codeword onto a non-uniform constellation according to a modulation scheme, and the constellation may include constellation points defined based on various tables according to the modulation scheme.

PARALLEL BIT INTERLEAVER
20180013449 · 2018-01-11 ·

A bit interleaving method involves applying a bit permutation process to a QC LDPC codeword made up of N cyclic blocks each including Q bits, and dividing the codeword, after the bit permutation process, into a plurality of constellation words each imade up of M bits, the codeword being divided into N/M sections, each constellation word being associated with one of the N/M sections, and the bit permutation process being performed such that each of the constellation words includes one bit from each of M different cyclic blocks associated with a given section.

PARALLEL BIT INTERLEAVER
20180013449 · 2018-01-11 ·

A bit interleaving method involves applying a bit permutation process to a QC LDPC codeword made up of N cyclic blocks each including Q bits, and dividing the codeword, after the bit permutation process, into a plurality of constellation words each imade up of M bits, the codeword being divided into N/M sections, each constellation word being associated with one of the N/M sections, and the bit permutation process being performed such that each of the constellation words includes one bit from each of M different cyclic blocks associated with a given section.

BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 16200 AND CODE RATE OF 4/15 AND 64-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.

Communication device and communication method
11711101 · 2023-07-25 · ·

A communication device that applies an error in an upper layer in addition to error correction in a physical layer is provided. The communication device includes an acquisition unit that acquires control information regarding forward error correction (FEC) of an upper layer and control information regarding FEC of a lower layer, an encoding-decoding unit that performs error correction encoding or decoding of an information sequence in the upper layer according to control information regarding the FEC of the upper layer, and a puncturing processing unit that performs puncturing or depuncturing in the upper layer. The information sequence after FEC encoding of the upper layer is divided into blocks, and puncturing and interleaving are performed in units of blocks.