A method for execution by a dispersed storage network (DSN) managing unit includes receiving access information from a plurality of distributed storage and task (DST) processing units via a network. Cache memory utilization data is generated based on the access information. Configuration instructions are generated for transmission via the network to the plurality of DST processing units based on the cache memory utilization data.

Systems, methods, apparatuses, and computer program products for error probability feedback are provided. One method may include transmitting, to at least one user equipment, a configuration for protocol data unit error probability calculation and reporting. The method may also include receiving, from the at least one user equipment, feedback related to the protocol data unit error probability.

A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits to be transmitted in a current frame; a parity permutator configured to perform by group-wise interleaving a plurality of bit groups configuring the parity bits based on a group-wise interleaving pattern comprising a first pattern and a second pattern; a puncturer configured to puncture some of the parity-permutated parity bits; and an additional parity generator configured to select at least some of the punctured parity bits to generate additional parity bits to be transmitted in a previous frame of the current frame, based on the first pattern and the second pattern.

A method of failure mapping is provided. The method includes determining that a non-volatile memory block in the memory has a defect and generating a mask that indicates the non-volatile memory block and the defect. The method includes reading from the non-volatile memory block with application of the mask, wherein the reading and the application of the mask are performed by the non-volatile solid-state storage.

A storage network processing system includes a processor, a network interface and memory that stores operational instructions. The operation instructions enable the processor to receive a data object for storage and dispersed error encode the data object in accordance with dispersed error encoding parameters to produce a plurality of encoded data slices. The operation instructions further enable the processor to generate to determine a plurality of site slice sets from the plurality of encoded data slices, where each site slice set of the plurality of site slice sets includes a number of unique encoded data slices of the plurality of encoded data slices that is greater than or equal to a site write threshold value. The operation instructions further enable the processor to a designate one of a plurality of storage sites for each of the plurality of site slice sets and transmit each of the plurality of site slice sets to a corresponding designated one of the plurality of storage sites via the network.

A conversion method according to the present disclosure, is a method of converting an objective function of combinatorial optimization related to encoding and decoding into a form of an Ising model, the conversion of the objective function into the form of the Ising model being performed by the conversion method, and the method includes: removing a modulo 2 operation from the objective function by using first transformation; replacing a first variable to be optimized included in the objective function with a second variable corresponding to an Ising spin by using second transformation; and reducing a degree related to the second variable of the objective function by using third transformation.

Example systems, read channel circuits, data storage devices, and methods to provide signal correction based on soft information in a read channel are described. The read channel circuit includes a soft output detector, such as a soft output Viterbi algorithm (SOVA) detector, and a signal correction circuit. The soft output detector passes detected data bits and corresponding soft information to the signal correction circuit. The signal correction circuit uses the soft information to determine a signal correction value, which is combined with input signal to return a corrected signal to the soft output detector for a next iteration. In some configurations, the signal correction value may compensate for DC offset, AC coupling poles, and/or signal asymmetries to reduce baseline wander in the read channel.

A digital isolator can include: an encoding circuit configured to receive and encode an input digital signal, in order to generate an encoded signal, wherein a rising edge of the input digital signal is encoded as a first pulse sequence, and a falling edge of the input digital signal is encoded as a second pulse sequence; an isolation element coupled to the encoding circuit, and being configured to transmit the encoded signal in an electrically isolated manner; and a decoding circuit configured to receive the encoded signal through the isolation element, and to decode the encoded signal, in order to generate an output digital signal consistent with the input digital signal.

A digital isolator can include: an encoding circuit configured to receive and encode an input digital signal, in order to generate an encoded signal, wherein a rising edge of the input digital signal is encoded as a first pulse sequence, and a falling edge of the input digital signal is encoded as a second pulse sequence; an isolation element coupled to the encoding circuit, and being configured to transmit the encoded signal in an electrically isolated manner; and a decoding circuit configured to receive the encoded signal through the isolation element, and to decode the encoded signal, in order to generate an output digital signal consistent with the input digital signal.

A data processing system includes a storage medium, and a controller including a data processing block, configured to receive data from a host, transmit the received data to the storage medium, read data from the storage medium in response to a read request from the host, and decode the read data by the data processing block according to multiple decoding modes. The data processing block includes a first decoder and a second decoder, and is configured to manage the first decoder and the second decoder to run the decoding for the read data, and activate a fast decoding having shorter latency than a normal decoding after a fast decoding condition is satisfied.