H03M13/6362

Integrated circuit for reception apparatus

Disclosed are an encoder, a transmission device, and an encoding method with which the transmission amount is reduced and a deterioration in transmission efficiency is suppressed while improving reception quality when QC-LDPC or a like block encoding is used. A puncture pattern setting unit (620) searches for a puncture pattern for each integral multiple of the number of columns or for each divisor of the number of columns of a sub block matrix that forms a check matrix (H) of a QC-LDPC code, and a puncture unit (data reduction unit) (630) switches the puncture pattern for each integral multiple of the number of columns or for each divisor of the number of columns of the sub block matrix that forms the check matrix of the QC-LDPC code.

Transmitter, receiver, and signal processing method thereof

A transmitter and receiver of a broadcasting signal and a method of processing the broadcasting signal are provided. The transmitter includes: a segmenter configured to segment an L1 signaling of a frame into a plurality of segmented L1 signalings such that each of the segmented L1 signalings has bits a number of which is equal to or smaller than a predetermined number; and an encoder configured to perform a Bose, Chaudhuri, Hocquenghem (BCH) and a low density parity check (LDPC) encoding, or the LDPC encoding without the BCH encoding, with respect to the segmented L1 signalings.

Method for encoding information in communication network

Embodiments of the application provide a method for rate matching in a wireless communication network. A device obtains K information bits and a target code length M of a polar code, determines, according to a minimum value of a set of values, a mother code length N.sub.1, polar encodes the K information bits to obtain an encoded sequence of N.sub.1 bits, obtains a target sequence of M bits from the N.sub.1 bit encoded sequence, and outputs the M-bit target sequence. When the mother code length N.sub.1 is larger than the target code length M, (N.sub.1−M) bits of the encoded sequence are punctured or shortened from the N.sub.1 bit encoded sequence.

Channel coding method of variable length information using block code

A method for channel-coding information bits using a code generation matrix including 32 rows and A columns corresponding to length of the information bits includes, channel-coding the information bits having “A” length using basis sequences having 32-bit length corresponding to columns of the code generation matrix, and outputting the channel-coded result as an output sequence. If “A” is higher than 10, the code generation matrix is generated when (A−10) additional basis sequences were added as column-directional sequences to a first or second matrix. The first matrix is a TFCI code generation matrix composed of 32 rows and 10 columns used for TFCI coding. The second matrix is made when at least one of an inter-row location or an inter-column location of the first matrix was changed. The additional basis sequences satisfy a value 10 of a minimum Hamming distance.

Rate-matching scheme for control channels using polar codes

Certain aspects of the present disclosure generally relate to wireless communications and, more particularly, to methods and apparatus for rate-matching control channels using polar codes. An exemplary method generally includes encoding a stream of bits using a polar code, determining a size of a circular buffer for storing the encoded stream of bits based, at least in part, on a minimum supported code rate and a control information size, and performing rate-matching on stored encoded stream of bits based, at least in part, on a mother code size, N, and a number of coded bits for transmission, E.

Data retransmission method and apparatus to obtain information to be transmitted and to perform Polar encoding on the information

This disclosure provides a data retransmission method and apparatus. The method includes: A transmitting device obtains information to be transmitted for a t.sup.th time, where the information to be transmitted for the t.sup.th time includes R.sub.t extension locations and information to be transmitted for a (t−1).sup.th time, and the extension locations include M.sub.t information bits and L.sub.t check bits corresponding to the M.sub.t information bits. The transmitting device then performs Polar encoding on the information to be transmitted for the t.sup.th time, to obtain a codeword after the Polar encoding, obtains a codeword for (t−1).sup.th retransmission based on the codeword after the Polar encoding, and transmits the codeword for (t−1).sup.th retransmission. A receiving device performs polar decoding after receiving the codeword for (t−1).sup.th retransmission, to obtain a decoding result of codewords for t times of transmission. By performing, on an encoding side, check encoding on the information bits in an extension part, a decoding path can be reduced in a decoding process, thereby greatly reducing decoding complexity, and reducing storage overheads and calculation overheads.

ZERO PADDING APPARATUS FOR ENCODING FIXED-LENGTH SIGNALING INFORMATION AND ZERO PADDING METHOD USING SAME

A zero padding apparatus and method for fixed length signaling information are disclosed. A zero padding apparatus according to an embodiment of the present invention includes a processor configured to generate a LDPC information bit string by deciding a number of groups whose all bits are to be filled with 0 using a difference between a length of the LDPC information bit string and a length of a BCH-encoded bit string, selecting the groups using a shortening pattern order to fill all the bits of the groups with 0, and filling at least a part of remaining groups, which are not filled with 0, with the BCH-encoded bit string; and memory configured to provide the LDPC information bit string to an LDPC encoder.

ENCODING CIRCUIT, DECODING CIRCUIT, AND DECODING METHOD
20220393701 · 2022-12-08 · ·

An encoding circuit includes: a polar encoding unit capable of encoding a polar code of N bits; a frozen bit adding unit that generates a first sequence by adding frozen bits to an input signal; and a bit arrangement changing unit that: generates a second sequence of N bits by arranging the first sequence in the second sequence according to an arrangement rule dependent on a ratio of N.sub.t bits, being a code length of a polar code to be encoded and being N bits or less, and N bits, and setting bit values at bit positions other than positions where the first sequence is arranged in the second sequence to zero when N.sub.t bits are less than N bits; and inputs the second sequence to the polar encoding unit. A code word of N.sub.t bits is generated by thinning processing based on a result of encoding the second sequence.

METHOD AND APPARATUS FOR ENCODING AND DECODING POLAR CODE

The disclosure relates to a fifth generation (5G) or sixth generation (6G) communication system for supporting a higher data transmission rate. An encoding apparatus may obtain state-indicator information indicating a state of each of bits included in the polar code based on an index set of the bits, identify a weak-bit or a second weak-bit corresponding to a parity bit candidate position preset according to an interconnection within a parity-check (PC)-chain of the polar code and between PC-chains of the polar code as a parity bit, based on a number of weak-bits determined according to the state-indicator information and a number of bits to be used as parity bits, and obtain a polar code including the identified parity bit.

Transmitter and shortening method thereof

A transmitter is provided. The transmitter includes: an outer encoder configured to encode input bits to generate outer-encoded bits including the input bits and parity bits; a zero padder configured to generate a plurality of bit groups each of which is formed of a same number of bits, maps the outer-encoded bits to some of the bits in the bit groups, and pads zero bits to remaining bits in the bit groups, based on a predetermined shortening pattern, thereby to constitute Low Density Parity Check (LDPC) information bits; and an LDPC encoder configured to encode the LDPC information bits, wherein the remaining bits in which zero bits are padded include some of the bit groups which are not sequentially disposed in the LDPC information bits.