An apparatus is provided which comprises at least one processor, at least one memory including computer program code, and the at least one processor, with the at least one memory and the computer program code, being arranged to cause the apparatus to at least perform generating a code block including information bits and parity bits, the parity bits being generated by performing a cyclic redundancy check on the information bits, determining the number of parity bits used in generating the code block based on an applied linear error correcting code base graph and/or based on the number of the information bits, and encoding the code block by using the applied linear error correcting code base graph.

A data encoding device suitable for encoding a plurality of LDPC codes is disclosed including an input interface and an output interface, and a first circuit for encoding quasi-cyclic LDPC code, connected at an input to the input interface and at an output to the input of a first multiplexer circuit, a second circuit for encoding quasi-cyclic LDPC code, connected at an input to the input interface and at an output to the input of the first multiplexer circuit, a third circuit for encoding quasi-cyclic LDPC code, connected at an input to the output of the first multiplexer circuit and at an output to the input of a second multiplexer circuit.

Embodiments are directed to collision-free hashing for accessing cryptographic computing metadata and for cache expansion. An embodiment of an apparatus includes one or more processors to: receive a physical address; compute a set of hash functions using a set of different indexes corresponding to the set of hash functions, wherein the set of hash functions combine additions, bit-level reordering, bit-linear mixing, and wide substitutions, wherein the plurality of hash functions differ in the bit-linear mixing; access a plurality of cache units utilizing the set of hash functions; read different sets of the plurality of cache units in parallel, where a set of the different sets is obtained from each cache unit of the plurality of cache units; and responsive to the physical address being located one of the different sets, return cache line data of the set corresponding to the set of the cache unit having the physical address.

Methods, systems, and apparatus are provided for encoding code blocks for transmission in a wireless communication system. An example encoding method in a wireless communication system includes determining, for one or more code blocks of a transport block, that at least one of a plurality of criteria is met, wherein the plurality of criteria includes that a coding rate (R) is less than or equal to ¼ or that a transport block size (TBS) is less than or equal to 3824 bits and the R is less than or equal to ⅔. The one or more code blocks are encoded using low-density parity-check (LDPC) base graph 2, wherein a maximum code block size is 3840 bits. The one or more encoded code blocks are transmitted over the wireless network.

A transmitter and receiver of a broadcasting signal and a method of processing the broadcasting signal are provided. The transmitter includes: a segmenter configured to segment an L1 signaling of a frame into a plurality of segmented L1 signalings such that each of the segmented L1 signalings has bits a number of which is equal to or smaller than a predetermined number; and an encoder configured to perform a Bose, Chaudhuri, Hocquenghem (BCH) and a low density parity check (LDPC) encoding, or the LDPC encoding without the BCH encoding, with respect to the segmented L1 signalings.

A decoding method adopting an algorithm with weight-based adjusted parameters and a decoding system are provided. The decoding method is applied to a decoder. M×N low density parity check codes (LDPC codes) having N variable nodes and M check nodes are generated from input signals. In the decoding method, information of the variable nodes and the check nodes is initialized. The information passed from the variable nodes to the check nodes is formed after multiple iterations. After excluding a connection to be calculated, a product of the remaining connections between the variable nodes and the check nodes is calculated. Next, an estimated first minimum or an estimated second minimum can be calculated with multi-dimensional parameters. The information passed from the check nodes to the variable nodes can be updated for making a decision.

An encoding circuit includes: a polar encoding unit capable of encoding a polar code of N bits; a frozen bit adding unit that generates a first sequence by adding frozen bits to an input signal; and a bit arrangement changing unit that: generates a second sequence of N bits by arranging the first sequence in the second sequence according to an arrangement rule dependent on a ratio of N.sub.t bits, being a code length of a polar code to be encoded and being N bits or less, and N bits, and setting bit values at bit positions other than positions where the first sequence is arranged in the second sequence to zero when N.sub.t bits are less than N bits; and inputs the second sequence to the polar encoding unit. A code word of N.sub.t bits is generated by thinning processing based on a result of encoding the second sequence.

A storage device includes: a memory; and a processor configured to, at the time of writing data into the memory, generate a first check code common to a plurality of types of error correction codes from the data on the basis of a correlation relationship between the plurality of types of error correction codes, add the first check code to the data and write the data into the memory, convert the first check code into a second check code based on any one of the plurality of types of error correction codes at the time of reading the data from the memory, and perform error correction by using the second check code.

A data processing method and apparatus. The data process method includes: determining, by a transmitting node, a code block length N.sub.0 for encoding an information bit sequence to be transmitted according to a data characteristic for representing the information bit sequence to be transmitted and a preset parameter corresponding to the data characteristic; performing, by the transmitting node, polar encoding on the information bit sequence to be transmitted according to the code block length N.sub.0; and transmitting, by the transmitting node, a code block obtained through the polar encoding to a receiving node.

A low density parity check (LDPC) channel encoding method for use in a wireless communications system includes a communication device encoding an input bit sequence by using a LDPC matrix to obtain an encoded bit sequence for transmission. The LDPC matrix is obtained based on a lifting factor Z and a base matrix. The encoding method can be used in various communications systems including the fifth generation (5G) telecommunication systems, and can support various encoding requirements for information bit sequences with different code lengths.