Systems and methods for correction of sigma-delta analog-to-digital converters (ADCs) using neural networks are described. In an illustrative, non-limiting embodiment, a device may include: an ADC; a filter coupled to the ADC, where the filter is configured to receive an output from the ADC and to produce a filtered output; and a neural network coupled to the filter, where the neural network is configured to receive the filtered output and to produce a corrected output.

There is described a hybrid ADC device for converting an analog input signal (Vin) into a digital output signal (Vout), the device comprising a first ADC circuit configured to receive the analog input signal (Vin) and convert it into a first digital signal (Y0); a DAC circuit configured to receive the first digital signal and convert it into a first analog signal; a delay circuit configured to delay the analog input signal; a first combiner configured to generate an analog residual signal by subtracting the first analog signal from the delayed analog input signal; a second ADC circuit configured to receive the residual analog signal and convert it into a second digital signal (Y1); a filter circuit configured to receive the first digital signal and output a filtered first digital signal (Y0′), the filter circuit having a transfer function corresponding to a combined transfer function of the DAC circuit and the second ADC circuit; and a second combiner configured to generate the digital output signal (Vout) by adding the second digital signal and the filtered first digital signal, wherein the first ADC circuit comprises an anti-aliasing filter. Furthermore, a corresponding method and an automobile radar system are described.

A quantizer for a sigma-delta modulator, a sigma-delta modulator, and a method of shaping noise are provided. The quantizer includes: an integrator configured to generate, in a K.sup.th sampling period, a quantization error signal for a K.sup.th period according to an internal signal, a quantization error signal for a (K−1).sup.th period, a filtered quantization error signal for the (K−1).sup.th period and a filtered quantization error signal for a (K−2).sup.th period; an integrating capacitor configured to store the quantization error signal for the K.sup.th period, to weight the internal signal in a (K+1).sup.th sampling period; a passive low-pass filter configured to acquire the quantization error signal for the K.sup.th period in a K.sup.th discharge period, and feed back the filtered quantization error signal to the integrator in a (K+1).sup.th sampling period and a (K+2).sup.th sampling period; and a comparator configured to quantize the quantization error signal for the K.sup.th period.

A circuit may include a two-stage feedforward compensated operational transconductance integrated amplifier, and the two-stage feedforward compensated operational transconductance integrated amplifier may include an input terminal, an output terminal, a signal path between the input terminal and the output terminal, the signal path comprising a first signal path gain stage and a second signal path gain stage, and ripple rejection circuitry coupled between the input terminal and an intermediate node of the signal path located between the first signal path gain stage and the second signal path gain stage. The ripple rejection circuitry may include a first ripple rejection circuitry gain stage coupled at its input to the input terminal and coupled at its output to an input terminal of a chopper circuit, a notch filter coupled at its input to an output terminal of the chopper circuit, and a second ripple rejection circuitry gain stage coupled at its input to an output terminal of the notch filter and coupled at its output to the intermediate node.

A device includes a sensor configured to output an analog sensor signal, an analog-to-digital converter circuit configured to convert the analog sensor signal into a sigma-delta-modulated digital signal having a bit width of n bits, and a pulse width modulator configured to generate a pulse-width-modulated signal based on the sigma-delta-modulated digital signal.

A delta-sigma modulation apparatus performs delta-sigma modulation on a first signal as an input signal and outputs a second signal, outputs, using the second signal and a third signal generated through a transmission process of the second signal, a fourth signal that is an approximated value of a signal which is generated through at least part of the transmission process, and performs the delta-sigma modulation on the first signal using the fourth signal and outputs the second signal.

The control circuit for a MEMS gyroscope is configured to receive a measurement signal which has a quadrature component and a sensing component. The control circuit has: an input stage which acquires an input signal, generating an acquisition signal, where the input signal is a function of the measurement signal and of a quadrature cancellation signal; a processing stage which extracts a first component of the acquisition signal, indicative of the sensing component of the measurement signal and having a sensing frequency band; and a quadrature correction stage which extracts a second component of the acquisition signal, indicative of the quadrature component of the measurement signal, and generates the quadrature cancellation signal from a reference signal. The quadrature cancellation signal is a signal modulated as a function of the second component of the acquisition signal, at an update frequency which is outside the sensing frequency band.

An isolator of embodiments includes a ΔΣ analog-digital converter configured to convert an analog signal into a digital signal of one bit and transmit the digital signal of one bit as normal data, a time direction multiplexing circuit configured to perform time direction multiplexing of alternately performing conversion of the normal data into a digital differential signal and transmission of the digital differential signal, and transmission of a special signal different from the normal data, and an insulated transmission circuit configured to transmit the digital differential signal and the special signal transmitted from the time direction multiplexing circuit via an insulating layer.

A quantizer for a sigma-delta modulator, a sigma-delta modulator, and a method of shaping noise are provided. The quantizer includes: an integrator configured to generate, in a K.sup.th sampling period, a quantization error signal for a K.sup.th period according to an internal signal, a quantization error signal for a (K−1).sup.th period, a filtered quantization error signal for the (K−1).sup.th period and a filtered quantization error signal for a (K−2).sup.th period; an integrating capacitor configured to store the quantization error signal for the K.sup.th period, to weight the internal signal in a (K+1).sup.th sampling period; a passive low-pass filter configured to acquire the quantization error signal for the K.sup.th period in a K.sup.th discharge period, and feed back the filtered quantization error signal to the integrator in a (K+1).sup.th sampling period and a (K+2).sup.th sampling period; and a comparator configured to quantize the quantization error signal for the K.sup.th period.

The invention provides a system improving signal handling, e.g., transmission and/or processing. In an embodiment, the system may include a filter circuit, a magnitude bit truncation circuit and a utility circuit. The filter circuit may be coupled to a target signal which contains one or more desired signals at one or more interested bands, for attenuating each said interested band to form a filtered signal. The magnitude bit truncation circuit may be coupled to the filter circuit, for truncating one or more bits of each sample of the filtered signal to form a truncated signal. The utility circuit may be coupled to the magnitude bit truncation circuit, for handling the truncated signal to implement handling of the target signal, so as to reduce resource requirement and enhance error tolerance comparing with directly handling the target signal.