Provided are an analog-to-digital (AD) converter, a sensor processing circuit, and a sensor system capable of improving responsiveness of feedback control. AD converter includes input part, AD conversion part, first output part, and second output part. The analog signal output from sensor is input to input part. AD conversion part digitally converts an analog signal to generate first digital data and second digital data. First output part outputs the first digital data to control circuit. Second output part outputs the second digital data to sensor before first output part outputs the first digital data.

Provided are an analog-to-digital (AD) converter, a sensor system, and a test system capable of reducing the time for test processing. AD converter includes input part, AD conversion part, first output part, and second output part. The analog signal output from sensor is input to input part. AD conversion part digitally converts an analog signal to generate first digital data and second digital data. First output part outputs the first digital data to control circuit. Second output part outputs the second digital data to test controller before first output part outputs the first digital data. In the test mode, test controller determines whether or not sensor system including sensor is in an abnormal state on the basis of the second digital data.

A MASH type sigma delta AD converter includes a modulator, an analog filter filtering an extraction signal obtained by extracting a probe signal and an quantization error generated in a quantizer within a sigma delta modulator, a low speed AD converter performing an AD conversion of an output signal of the analog filter, a first adaptive filter searching for a transfer function of the sigma delta modulator, a second adaptive filter searching for a transfer function from an output of the modulator to the low speed AD converter via the analog filter, and a noise cancellation circuit cancelling the probe signal and the quantization error included in an output signal of the quantizer using the search results by the first and second adaptive filters.

An analog-to-digital converter, ADC, module is configured to operate in a coarse conversion ADC phase, and a fine conversion ADC phase comprising a delta modulation loop for tracking a signal, wherein the ADC module is configured to, at initiation of input of an analog signal, operate in the coarse conversion ADC phase for determining a coarse digital value; wherein the ADC module is configured to, when the coarse digital value is determined, operate in the fine conversion ADC phase, receive the coarse digital value as an initial approximation of the analog signal and track the analog signal during a finite duration.

In an embodiment a method includes providing an analog signal having a first value of a temperature of an object, performing an analog-to-digital conversion of the analog signal using a first analog-to-digital converter (ADC) thereby providing a first digital signal representing an initial digital temperature value, performing an analog-to-digital conversion of the analog signal using a second ADC thereby providing a second digital signal representing a digital reference temperature value, regularly providing the analog signal having a successive value of the temperature of the object, performing the analog-to-digital conversion of the analog signal using the second ADC thereby providing the second digital signal representing a successive digital temperature value, calculating a digital delta temperature value according to a difference between the successive digital temperature value and the digital reference temperature value and repeating portions of the method as long as the digital delta temperature value lies within a predefined range.

An analog-to-digital converter configured to convert an analog signal into a digital signal includes a first converter configured to receive an input signal of an analog type, compare the input signal with a plurality of reference signals, select one of the plurality of reference signals based on the comparison, and output an upper bit that is a portion of the digital signal based on the selected reference signal, a second converter configured to perform an oversampling operation n times based on a residue signal indicating a difference between an upper analog signal corresponding to the upper bit value and the input signal and output an intermediate bit value of the digital signal corresponding to the first to n-th oversampling signals generated respectively during the oversampling operations performed n times, and a third converter configured to output a lower bit value of the digital signal corresponding to the n-th oversampling signal.

In an embodiment a method includes providing an analog signal comprising a first value of a temperature of an object, performing an analog-to-digital conversion of the analog signal using a first analog-to-digital converter (ADC) thereby providing a first digital signal representing an initial digital temperature value, performing an analog-to-digital conversion of the analog signal using a second ADC thereby providing a second digital signal representing a digital reference temperature value, regularly providing the analog signal comprising a successive value of the temperature of the object, performing the analog-to-digital conversion of the analog signal using the second ADC thereby providing the second digital signal representing a successive digital temperature value, calculating a digital delta temperature value according to a difference between the successive digital temperature value and the digital reference temperature value and repeating providing the analog signal, performing the analog-to-digital conversion and calculating the digital delta temperature value as long as the digital delta temperature value lies within a predefined range.

An analog-to-digital converter, ADC, module is configured to operate in a coarse conversion ADC phase, and a fine conversion ADC phase comprising a delta modulation loop for tracking a signal, wherein the ADC module is configured to, at initiation of input of an analog signal, operate in the coarse conversion ADC phase for determining a coarse digital value; wherein the ADC module is configured to, when the coarse digital value is determined, operate in the fine conversion ADC phase, receive the coarse digital value as an initial approximation of the analog signal and track the analog signal during a finite duration.

A MASH type sigma delta AD converter includes a modulator, an analog filter filtering an extraction signal obtained by extracting a probe signal and an quantization error generated in a quantizer within a sigma delta modulator, a low speed AD converter performing an AD conversion of an output signal of the analog filter, a first adaptive filter searching for a transfer function of the sigma delta modulator, a second adaptive filter searching for a transfer function from an output of the modulator to the low speed AD converter via the analog filter, and a noise cancellation circuit cancelling the probe signal and the quantization error included in an output signal of the quantizer using the search results by the first and second adaptive filters.

A partitioned delta-sigma modulator for high-speed applications includes a plurality of modulation stages arranged in parallel to input and output terminals of the modulator and interconnected to one another in series. In some aspects, each of the plurality of modulation stages is configured to combine a first error signal from a prior modulation stage of the plurality of modulation stages with a first digital signal to produce an adder signal. In some aspects, the first error signal includes a delay from the prior modulation stage. Each of the plurality of modulation stages is also configured to convert the adder signal having a first bit width into a quantized signal having a second bit width smaller than the first bit width. Each of the modulation stages is also configured to provide a second error signal based on the quantized signal to a subsequent modulation stage of the plurality of modulation stages.