H03M5/12

System and methods for data compression and nonuniform quantizers

A method for differentiator-based compression of digital data includes (a) multiplying a tap-weight vector by an original data vector to generate a predicted signal, the original data vector comprising N sequential samples of an original signal, N being an integer greater than or equal to one, (b) using a subtraction module, subtracting the predicted signal from a sample of the original signal to obtain an error signal, (c) using a quantization module, quantizing the error signal to obtain a quantized error signal, and (d) updating the tap-weight vector according to changing statistical properties of the original signal.

Bit error rate estimation and error correction and related systems, methods, devices

Physical layer devices and related methods for determining Bit Error Rates (BERs) and correcting errors in signals received through shared transmission media of wireless local area networks are disclosed. A physical layer device is configured to identify coding violations in received signal, determine a rate of the coding violations in the signal, and estimate a BER of the signal to be equal to the determined rate of the coding violations. A physical layer device is configured to invert a half symbol immediately preceding or immediately following a coding violation based, at least in part, on signal integrities of the half symbol immediately preceding and the half symbol immediately following the coding violation to correct a bit error.

Method, transmitter, structure, transceiver and access point for provision of multi-carrier on-off keying signal

A method and transmitter for transmitting an On-Off Keying, OOK, signal which comprises an ON waveform and an OFF waveform forming a pattern representing transmitted binary information as a Manchester code. For one binary value of information to be transmitted, a first set of complex-valued frequency domain symbols is provided to an inverse fast Fourier transformer, or for the other binary value of information to be transmitted, a second set of complex-valued frequency domain symbols is provided to the inverse fast Fourier transformer. The inverse fast Fourier transform is performed to form an orthogonal frequency division multiplex, OFDM representation, including a cyclic prefix, of the OOK signal of information to be transmitted. The OFDM representation is then transmitted.

Method, transmitter, structure, transceiver and access point for provision of multi-carrier on-off keying signal

A method and transmitter for transmitting an On-Off Keying, OOK, signal which comprises an ON waveform and an OFF waveform forming a pattern representing transmitted binary information as a Manchester code. For one binary value of information to be transmitted, a first set of complex-valued frequency domain symbols is provided to an inverse fast Fourier transformer, or for the other binary value of information to be transmitted, a second set of complex-valued frequency domain symbols is provided to the inverse fast Fourier transformer. The inverse fast Fourier transform is performed to form an orthogonal frequency division multiplex, OFDM representation, including a cyclic prefix, of the OOK signal of information to be transmitted. The OFDM representation is then transmitted.

LOW OVERHEAD TRANSITION ENCODING CODES
20220368342 · 2022-11-17 ·

A processing circuit configured to: receive original data; partition the original data into a plurality of original q-bit words; assemble a data packet including N original q-bit words from the plurality of original q-bit words; identify a first encoder value and a second encoder value that are absent from the values of the N original q-bit words; encode the N original q-bit words based on a one-to-one mapping from q-bit original values to q-bit encoded values based on the first encoder value and the second encoder value to generate N encoded q-bit payload words, the N encoded q-bit payload words being free of words that are all-zeroes and free of words that are all-ones; generate a key representing the first encoder value and the second encoder value; and transmit the key and the N encoded q-bit payload words.

LOW OVERHEAD TRANSITION ENCODING CODES
20220368342 · 2022-11-17 ·

A processing circuit configured to: receive original data; partition the original data into a plurality of original q-bit words; assemble a data packet including N original q-bit words from the plurality of original q-bit words; identify a first encoder value and a second encoder value that are absent from the values of the N original q-bit words; encode the N original q-bit words based on a one-to-one mapping from q-bit original values to q-bit encoded values based on the first encoder value and the second encoder value to generate N encoded q-bit payload words, the N encoded q-bit payload words being free of words that are all-zeroes and free of words that are all-ones; generate a key representing the first encoder value and the second encoder value; and transmit the key and the N encoded q-bit payload words.

Symmetry receiving differential manchester encoding
11616861 · 2023-03-28 · ·

A 10BASE-T1S PHY method and apparatus are provided for receiving an analog MDI signal conveying DME-encoded data at a receiver comparator to generate a digital output signal, processing the digital output signal using a pulse encoder to generate a pulse-coded output signal with pulses generated at each rising or falling transition in the digital output signal, processing the pulse-coded output signal with an output driver to generate a pulse-coded driver output signal that is transmitted to a receiver interface pin RX, processing the pulse-coded driver output signal with an input comparator to generate a pulse-coded comparator output signal, processing the pulse-coded comparator output signal using a pulse decoder to generate a DME-encoded PMA input signal in which timing asymmetries caused by processing at the receiver comparator and/or output driver have been eliminated, and then processing DME-encoded PMA input signal at a digital PHY circuit in the Ethernet PHY.

Symmetry receiving differential manchester encoding
11616861 · 2023-03-28 · ·

A 10BASE-T1S PHY method and apparatus are provided for receiving an analog MDI signal conveying DME-encoded data at a receiver comparator to generate a digital output signal, processing the digital output signal using a pulse encoder to generate a pulse-coded output signal with pulses generated at each rising or falling transition in the digital output signal, processing the pulse-coded output signal with an output driver to generate a pulse-coded driver output signal that is transmitted to a receiver interface pin RX, processing the pulse-coded driver output signal with an input comparator to generate a pulse-coded comparator output signal, processing the pulse-coded comparator output signal using a pulse decoder to generate a DME-encoded PMA input signal in which timing asymmetries caused by processing at the receiver comparator and/or output driver have been eliminated, and then processing DME-encoded PMA input signal at a digital PHY circuit in the Ethernet PHY.

METHOD AND APPARATUS FOR TRANSMITTING PLCP FRAME IN WIRELESS LOCAL AREA NETWORK SYSTEM

A method of transmitting a Physical Layer Convergence Procedure (PLCP) frame in a Very High Throughput (VHT) Wireless Local Area Network (WLAN) system includes generating a MAC Protocol Data Unit (MPDU) to be transmitted to a destination station (STA), generating a PLCP Protocol Data Unit (PPDU) by adding a PLCP header, including an L-SIG field containing control information for a legacy STA and a VHT-SIG field containing control information for a VHT STA, to the MPDU, and transmitting the PPDU to the destination STA. A constellation applied to some of Orthogonal Frequency Division Multiplex (OFDM) symbols of the VHT-SIG field is obtained by rotating a constellation applied to an OFDM symbol of the L-SIG field.

Automatic Threshold Adjustment for USB Power Delivery to Work with Cables Out of Specification

An apparatus includes a bi-phase mark coded (BMC) input port configured to receive BMC signals from a universal serial bus (USB) cable. The apparatus further includes a threshold adjustment circuit configured to generate a threshold, and a comparator configured to compare an input BMC signal from the BMC input port and the threshold and based on the comparison, generate an adjusted input BMC signal. The threshold adjustment circuit is further configured to adjust the threshold based upon the input BMC signal.