A multi-mode antenna tuner circuit and related apparatus are provided. The multi-mode antenna tuner circuit can be configured to operate in a low-current mode or a high-power mode. When operating in the high-power mode, the multi-mode antenna tuner circuit can provide full-fledged functionalities and consume a higher amount of current. In contrast, in the low-current mode, the multi-mode antenna tuner circuit provides reduced functionality and consumes a lower amount of current. In this regard, in a wireless communication apparatus employing multiple multi-mode antenna tuner circuits, it is possible to opportunistically configure some multi-mode antenna tuner circuits to operate in the low-current mode based on an operating environment (e.g., frequency band, location, etc.) and internal state (e.g., battery level, signal strength, etc.) of the wireless communication apparatus. As a result, it may be possible to reduce consumption and heat dissipation without compromising performance of the wireless communication apparatus.

A multi-mode antenna tuner circuit and related apparatus are provided. The multi-mode antenna tuner circuit can be configured to operate in a low-current mode or a high-power mode. When operating in the high-power mode, the multi-mode antenna tuner circuit can provide full-fledged functionalities and consume a higher amount of current. In contrast, in the low-current mode, the multi-mode antenna tuner circuit provides reduced functionality and consumes a lower amount of current. In this regard, in a wireless communication apparatus employing multiple multi-mode antenna tuner circuits, it is possible to opportunistically configure some multi-mode antenna tuner circuits to operate in the low-current mode based on an operating environment (e.g., frequency band, location, etc.) and internal state (e.g., battery level, signal strength, etc.) of the wireless communication apparatus. As a result, it may be possible to reduce consumption and heat dissipation without compromising performance of the wireless communication apparatus.

A radiofrequency device includes at least the following elements: an antenna, linked to a first transmission channel or reception channel selection device K.sub.1, followed by a front-end stage whose output is linked to a second transmission channel or reception channel selection device K.sub.2, a group of filters connected between the second selection device K.sub.2 and a third transmission channel or reception channel selection device K.sub.3, the third selection device K.sub.3 is connected to a transceiver, the transceiver comprises a converter part, wherein the group of filters comprises N filters having distinct frequency bands B.sub.N in a given bandwidth B.sub.T, the group of filters is linked to a manager selecting at least one of the filters Fj of the group of filters in order to attenuate a first type of disturbing signals P.sub.1, in the vicinity of the centre frequency of the channel to be received, the transceiver comprises a stage comprising a variable filter, the variable filter is configured in order to eliminate a second type of disturbing signals P.sub.2, the stage is connected between the group of filters and the analog-digital and digital-analog conversion set, the number N of filters of the group of filters is chosen by taking into account the operating frequency band value of the antenna, the value of a selected bandwidth Bc and a coefficient δ taking into account overlap effects.

A radiofrequency device includes at least the following elements: an antenna, linked to a first transmission channel or reception channel selection device K.sub.1, followed by a front-end stage whose output is linked to a second transmission channel or reception channel selection device K.sub.2, a group of filters connected between the second selection device K.sub.2 and a third transmission channel or reception channel selection device K.sub.3, the third selection device K.sub.3 is connected to a transceiver, the transceiver comprises a converter part, wherein the group of filters comprises N filters having distinct frequency bands B.sub.N in a given bandwidth B.sub.T, the group of filters is linked to a manager selecting at least one of the filters Fj of the group of filters in order to attenuate a first type of disturbing signals P.sub.1, in the vicinity of the centre frequency of the channel to be received, the transceiver comprises a stage comprising a variable filter, the variable filter is configured in order to eliminate a second type of disturbing signals P.sub.2, the stage is connected between the group of filters and the analog-digital and digital-analog conversion set, the number N of filters of the group of filters is chosen by taking into account the operating frequency band value of the antenna, the value of a selected bandwidth Bc and a coefficient δ taking into account overlap effects.

Aspects of the disclosure relate to a local oscillator frequency divider for a receiver or transmitter. In this regard a frequency divider has a first frequency input coupled to a first oscillator frequency output, a second frequency input coupled to a complementary second oscillator frequency output, a first in-phase/quadrature (I/Q) divided frequency output, and a complementary second I/Q divided frequency output. The frequency divider further has a first alternating current (AC) coupling capacitor between the first frequency input and the first oscillator frequency output and a second AC coupling capacitor between the second frequency input and the second oscillator frequency output.

Aspects of the disclosure relate to a local oscillator frequency divider for a receiver or transmitter. In this regard a frequency divider has a first frequency input coupled to a first oscillator frequency output, a second frequency input coupled to a complementary second oscillator frequency output, a first in-phase/quadrature (I/Q) divided frequency output, and a complementary second I/Q divided frequency output. The frequency divider further has a first alternating current (AC) coupling capacitor between the first frequency input and the first oscillator frequency output and a second AC coupling capacitor between the second frequency input and the second oscillator frequency output.

A transceiver interface circuit, comprising a driver amplifier (DA), a load line impedance modulation circuit coupled to the DA; and multiple selectable output ports coupled to the load line impedance modulation circuit, an impedance presented by the load line impedance modulation circuit being adjustable dependent on at least a number of output ports coupled to the load line impedance modulation circuit.

A transceiver interface circuit, comprising a driver amplifier (DA), a load line impedance modulation circuit coupled to the DA; and multiple selectable output ports coupled to the load line impedance modulation circuit, an impedance presented by the load line impedance modulation circuit being adjustable dependent on at least a number of output ports coupled to the load line impedance modulation circuit.

A four-phase (or multi-phase) generation circuit, related method of operation, and transceivers or other systems utilizing such a circuit, are disclosed herein. In one example embodiment, the circuit includes two input ports respectively configured to receive positive and negative differential input signals, and four output ports respectively configured to output first, second, third and fourth output signals, respectively, the second, third, and fourth output signals being respectively phase-shifted relative to the first output signal by or substantially by 90, 180, and 270 degrees. Also, the circuit includes four SR latches respectively including output terminals that are respectively coupled to the respective output ports. Further, the circuit includes two tunable delay circuits respectively coupled at least indirectly between the input ports and latches, and two comparison circuits configured to output respective feedback signals. The latches receive two delayed input signals provided by the delay circuits based upon the feedback signals.

A four-phase (or multi-phase) generation circuit, related method of operation, and transceivers or other systems utilizing such a circuit, are disclosed herein. In one example embodiment, the circuit includes two input ports respectively configured to receive positive and negative differential input signals, and four output ports respectively configured to output first, second, third and fourth output signals, respectively, the second, third, and fourth output signals being respectively phase-shifted relative to the first output signal by or substantially by 90, 180, and 270 degrees. Also, the circuit includes four SR latches respectively including output terminals that are respectively coupled to the respective output ports. Further, the circuit includes two tunable delay circuits respectively coupled at least indirectly between the input ports and latches, and two comparison circuits configured to output respective feedback signals. The latches receive two delayed input signals provided by the delay circuits based upon the feedback signals.