Patent classifications
H04B2203/5416
SYSTEM AND METHOD OF POWER LINE COMMUNICATION
Disclosed is a system and method for power line control of devices. The system operates in two modes. In mode one, the system operates on an open loop architecture with a controller generating a sinusoidal wave using a crystal oscillator. Control information is added to the sinusoidal wave by alternating the output of two phase shifted waves which have the same frequency and amplitude to form a control signal. The resulting control signal is sent on a power line. The control signal is received using a crystal filter, decoded and converted to executable instructions for the devices and data parameters for sensors. In mode two, the system operates on a hybrid open loop/closed loop architecture where devices are jointly controlled by the controller and the sensors.
System and methods of employing data over power in aircraft
A system and method is provided for data over power in an aircraft that includes a direct current power source for providing power over power lines to devices onboard the aircraft and a data injector coupled to the power lines for digitally modulating radio frequency data onto twisted pair data over power lines to provide data and power to the devices. A controller is coupled to the direct current power source and the data injector for providing the data to digitally modulate the radio frequency onto the twisted pair data over power lines such that power for the devices onboard the aircraft and data for control of the device onboard the aircraft are provided to the devices onboard the aircraft over the twisted pair data over power lines.
Method for generating low-frequency power carrier control signal
The present invention discloses a method for generating a low-frequency power carrier control signal. An alternating current power supply voltage/current of a target control device is enabled to experience a specified small jump within n T periods; a jump state in each period is respectively represented by one binary code; different combinations of the jump states in the n T periods and different combinations of formed n binary codes are preset to correspond to different control instructions in a system. After the target control device monitors the voltage/current jump, on the basis of a preset corresponding rule between the n binary codes as well as the jump state codes and the control instructions, control can be implemented according to a corresponding control instruction.
DECODING CIRCUIT AND CHIP
A decoding circuit and a chip are disclosed. The decoding circuit includes, connected in a sequence, a charge/discharge unit, a capacitor and a conversion unit. The charge/discharge unit is able to charge and discharge the capacitor, and a ratio of a total time required to transfer any amount of charge into the capacitor to a total time required to transfer the same amount of charge from the capacitor is a predetermined value. The conversion unit is configured to output a third level when a voltage on the capacitor exceeds a predetermined voltage and to otherwise output a fourth level. This arrangement alleviates the computational burden of an MCU, eliminates any adverse effect of noise in a transmitted signal, allows an extended effective transmission distance when using an HBS protocol and is self-adaptive to signals transmitted at different clock rates, thus solving the problems with the prior art including heavy MCU computational burden, a tradeoff between error correction and transmission distance and insufficient adaptiveness to signals transmitted at different clock rates.
Decoding circuit and chip
A decoding circuit and a chip are disclosed. The decoding circuit includes, connected in a sequence, a charge/discharge unit, a capacitor and a conversion unit. The charge/discharge unit is able to charge and discharge the capacitor, and a ratio of a total time required to transfer any amount of charge into the capacitor to a total time required to transfer the same amount of charge from the capacitor is a predetermined value. The conversion unit is configured to output a third level when a voltage on the capacitor exceeds a predetermined voltage and to otherwise output a fourth level. This arrangement alleviates the computational burden of an MCU, eliminates any adverse effect of noise in a transmitted signal, allows an extended effective transmission distance when using an HBS protocol and is self-adaptive to signals transmitted at different clock rates, thus solving the problems with the prior art including heavy MCU computational burden, a tradeoff between error correction and transmission distance and insufficient adaptiveness to signals transmitted at different clock rates.
SYNCHRONIZATION OF POWER SUPPLY DEVICES
Examples relate to communicating synchronization information from a satellite to a power supply device to enable time synchronization between the satellite and the power supply device. The power supply device includes a port to receive, from a modulator, a modulated current corresponding to a power consumption across a dummy load, where a level pattern of the modulated current indicates the synchronization information received from the satellite. The power supply device includes a power consumption analyzer configured to receive a modulated voltage, across a shunt resistor, corresponding to the modulated current and recover, from the modulated voltage, the synchronization information.
Communication on two power supply channels
A Communication System includes a first power supply channel including a first impedance and a second impedance, and configured to transfer electrical power from a first power source to a first load. The first power supply channel is configured to electrically couple to the first power source via a first common mode choke. The communication system also includes a second power supply channel comprising a third impedance and a fourth impedance, and configured to transfer electrical power from a second power source to a second load. The second power supply channel is configured to electrically couple to the second power source via a second common mode choke. The communication system further includes a first transceiver comprising a first output pin electrically coupled to the first power supply channel and a second output pin electrically coupled to the second power supply channel at a first end of the communication system.
SYSTEM AND METHODS OF EMPLOYING DATA OVER POWER IN AIRCRAFT
A system and method is provided for data over power in an aircraft that includes a direct current power source for providing power over power lines to devices onboard the aircraft and a data injector coupled to the power lines for digitally modulating radio frequency data onto twisted pair data over power lines to provide data and power to the devices. A controller is coupled to the direct current power source and the data injector for providing the data to digitally modulate the radio frequency onto the twisted pair data over power lines such that power for the devices onboard the aircraft and data for control of the device onboard the aircraft are provided to the devices onboard the aircraft over the twisted pair data over power lines.
Arrangement for Transmitting Information for a Component of a Vehicle
Arrangement (10) for transmitting information in a component (2) of a vehicle (1), in particular in a door handle (2) of the vehicle (1): a processing arrangement (50) for providing information at the component (2), preferably about a detection of an activation action at the component (2), an interface arrangement (40) for providing an electrical supply connection to a control device (30) of the vehicle (1), a stabilizing device (20) electrically connecting the interface assembly (40) to the processing assembly (50) to provide a power supply from the supply connection stabilized to the processing assembly (50), a current control arrangement (60) of the processing arrangement (50), which is electrically connected to the stabilizing device (20), for using the stabilizing device (20) to output a transmission signal (S) to the interface arrangement (40) in order to transmit the provided information to the control device (30) via the supply connection.
Systems and methods for implementing application profiles and device classes in power line communication (PLC) environments
Systems and methods for application profiles and device classes in power line communications (PLCs) are described. In some embodiments, a PLC device has the device class defined by a PHY layer and may include a processor and a memory coupled to the processor. The memory may be configured to store program instructions, which may be executable by the processor to cause the PLC device to communicate with a higher-level PLC apparatus over a power line using a frequency band. The frequency band may be selected based upon an application profile and/or a device class associated with the PLC device. In some implementations, the higher-level PLC apparatus may include a PLC gateway or a data concentrator, and the PLC device may include a PLC modem or the like. Examples of application profiles include access communications, in-premises connectivity, AC charging, and/or DC charging. Device classes may represent a minimum communication data rate and/or an operating frequency band restriction of the PLC device.