An oscillation circuit includes: a periodic signal generator which generates a periodic signal whose frequency varies; and a clock generator which generates a clock signal having a frequency commensurate with the frequency of the periodic signal.

Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a network entity may transmit a signal generated using a mixer, wherein the signal is subject to local oscillator (LO) leakage in connection with the generation using the mixer. The network entity may transmit an LO leakage estimate indicator based at least in part on the LO leakage of the signal in connection with the generation using the mixer. Numerous other aspects are described.

Detecting distortion in spread spectrum signals, including: identifying, based on a reference clock signal, one or more edges in a spread spectrum clock signal; incrementing one or more counters corresponding to the one or more edges, the one or more counters included in a plurality of counters; providing each bit of a respective output of the plurality of counters to a respective OR gate of a plurality of OR gates; and outputting, based on an output of an OR gate of the plurality of OR gates corresponding to a selected bit, an indication of whether distortion exists in the spread spectrum clock signal.

The invention relates to a method, a circuit, and an apparatus for detecting distortion in spread spectrum signals. An edge in a spread spectrum clock signal is identified based on a reference clock signal. The edge data is then provided to a set of counters which are incremented corresponding to an identified edge. Each bit of a respective output of the counters are provided to a respective OR gate of a set of OR gates. An OR gate from the set of OR gates corresponding to a selected bit then outputs an indication of whether distortion exists in the spread spectrum clock signal.

A calibration loop method and technical solution capable of finding or searching for an optimum setting, which can be applied to mitigate or minimize clock harmonic interference, for each of different channel frequencies used by a wireless communication device such as Bluetooth device. The optimum setting for example may comprise an optimum setting of a supply voltage level provided from a voltage regulator to a frequency generating circuit such as phase-locked loop (PLL), an optimum setting of a capacitance of an adjustable capacitor circuit such as controllable switching capacitor coupled between the input of a phase frequency detector (PFD) of the PLL and the ground, or an optimum setting of a combination of the supply voltage level with capacitance of the controllable switching capacitor.

In an aspect, an apparatus for distribution of frequency reference to a receiving end over a transmission medium comprises a first mixer adapted to mix a frequency reference signal having a reference frequency with a local oscillator signal having a local oscillator frequency to provide a forward frequency reference signal, a communication section adapted to transmit the forward frequency reference signal and receive a first backward frequency reference signal, a second mixer adapted to mix the first backward frequency reference signal with the local oscillator signal to provide a second backward frequency reference signal and a phase comparator and control circuit adapted to adjust the local oscillator frequency based on a phase shift of the second backward frequency reference signal so as to compensate for a phase shift of the forward frequency reference signal.

Disclosed DSI3 slave devices may enhance the data rate of the DSI3 bus using modified nibble encoding, pulse shaping, spectral shaping, and/or message preambles to provide chip time and level tracking. In one embodiment, there is provided a communications method that includes: converting a binary data stream into a ternary unipolar non-return-to-zero level channel signal; and driving the channel signal as an electrical current on a signal conductor. The converting uses an encoder that maps binary nibbles to a set of ternary triplets, each triplet in the set having an average level between 2/3 and 4/3 inclusive, and each triplet including at least one internal transition between levels.

In an aspect, an apparatus for distribution of frequency reference to a receiving end over a transmission medium comprises a first mixer adapted to mix a frequency reference signal having a reference frequency with a local oscillator signal having a local oscillator frequency to provide a forward frequency reference signal, a communication section adapted to transmit the forward frequency reference signal and receive a first backward frequency reference signal, a second mixer adapted to mix the first backward frequency reference signal with the local oscillator signal to provide a second backward frequency reference signal and a phase comparator and control circuit adapted to adjust the local oscillator frequency based on a phase shift of the second backward frequency reference signal so as to compensate for a phase shift of the forward frequency reference signal.

Disclosed DSI3 slave devices may enhance the data rate of the DSI3 bus using modified nibble encoding, pulse shaping, spectral shaping, and/or message preambles to provide chip time and level tracking. In one embodiment, there is provided a communications method that includes: converting a binary data stream into a ternary unipolar non-return-to-zero level channel signal; and driving the channel signal as an electrical current on a signal conductor. The converting uses an encoder that maps binary nibbles to a set of ternary triplets, each triplet in the set having an average level between 2/3 and 4/3 inclusive, and each triplet including at least one internal transition between levels.

An oscillation circuit includes: a periodic signal generator which generates a periodic signal whose frequency varies; and a clock generator which generates a clock signal having a frequency commensurate with the frequency of the periodic signal.