The present invention provides a semiconductor device realizing suppression of increase in consumption power. A semiconductor device has a signal line, a reception buffer circuit which is coupled to an end of the signal line and to which a signal is supplied from the signal line, and a delay element which is wired-OR coupled to an end of the signal line and shapes a waveform of a signal at the end of the signal line.

The present invention provides a semiconductor device realizing suppression of increase in consumption power. A semiconductor device has a signal line, a reception buffer circuit which is coupled to an end of the signal line and to which a signal is supplied from the signal line, and a delay element which is wired-OR coupled to an end of the signal line and shapes a waveform of a signal at the end of the signal line.

A transmission device according to the disclosure includes a driver section that is able to transmit a data signal by using three or more predetermined number of voltage states and set voltages in each of the voltage states; and a control section that sets an emphasis voltage that is based on a transition among the predetermined number of the voltage states, and thereby causes the driver section to perform emphasis.

A transmission device according to the disclosure includes a driver section that is able to transmit a data signal by using three or more predetermined number of voltage states and set voltages in each of the voltage states; and a control section that sets an emphasis voltage that is based on a transition among the predetermined number of the voltage states, and thereby causes the driver section to perform emphasis.

A transmission device according to the disclosure includes a driver section that is able to transmit a data signal by using three or more predetermined number of voltage states and set voltages in each of the voltage states; and a control section that sets an emphasis voltage that is based on a transition among the predetermined number of the voltage states, and thereby causes the driver section to perform emphasis.

A transmission device according to the disclosure includes a driver section that is able to transmit a data signal by using three or more predetermined number of voltage states and set voltages in each of the voltage states; and a control section that sets an emphasis voltage that is based on a transition among the predetermined number of the voltage states, and thereby causes the driver section to perform emphasis.

A transmission device according to the disclosure includes a driver section that is able to transmit a data signal by using three or more predetermined number of voltage states and set voltages in each of the voltage states; and a control section that sets an emphasis voltage that is based on a transition among the predetermined number of the voltage states, and thereby causes the driver section to perform emphasis.

A transmission device according to the disclosure includes a driver section that is able to transmit a data signal by using three or more predetermined number of voltage states and set voltages in each of the voltage states; and a control section that sets an emphasis voltage that is based on a transition among the predetermined number of the voltage states, and thereby causes the driver section to perform emphasis.

A receiving circuit and method for increasing bandwidth are provided. The receiving circuit includes a linear equalizer circuit and a variable gain amplifier. The linear equalizer circuit includes a first negative impedance converter, to generate a first capacitance. The variable gain amplifier is coupled to the linear equalizer circuit. The variable gain amplifier includes a first-stage gain circuit and a feedback circuit. The first-stage gain circuit is coupled to the feedback circuit, and the feedback circuit generates a zero-point at the output end of the first-stage gain circuit.

A receiving circuit and method for increasing bandwidth are provided. The receiving circuit includes a linear equalizer circuit and a variable gain amplifier. The linear equalizer circuit includes a first negative impedance converter, to generate a first capacitance. The variable gain amplifier is coupled to the linear equalizer circuit. The variable gain amplifier includes a first-stage gain circuit and a feedback circuit. The first-stage gain circuit is coupled to the feedback circuit, and the feedback circuit generates a zero-point at the output end of the first-stage gain circuit.