H04B3/232

Non-line-of-sight (NLOS) coverage for millimeter wave communication

A system, in an active reflector device, adjusts a first amplification gain of each of a plurality of radio frequency (RF) signals received at a receiver front-end from a first equipment via a first radio path of an NLOS radio path. A first phase shift is performed on each of the plurality of RF signals with the adjusted first amplification gain. A combination of the plurality of first phase-shifted RF signals is split at a transmitter front-end. A second phase shift on each of the split first plurality of first phase-shifted RF signals is performed. The plurality of RF signals as a directed beam is transmitted to a second equipment via a second radio path of the NLOS radio path.

TRANSCEIVER
20230060378 · 2023-03-02 ·

A transceiver includes a first digital-to-analog converter (DAC), a second DAC, and a timing control module. In a calibration mode, the first DAC transmits a transmitting signal; the second DAC transmits an echo cancellation signal; and the timing control module, according to an echo signal of the transmitting signal and the echo cancellation signal, obtains a timing offset therebetween, and generates a first timing control signal and a second timing control signal to the first DAC and the second. DAC according to the timing offset, respectively. The first DAC adjusts a transmission delay of transmitting the transmitting signal according to the first timing control signal, and/or the second DAC modifies a transmission delay of transmitting the echo cancellation signal according to the second timing control signal.

Signal transceiver circuit, method of operating signal transmitting circuit, and method of setting delay circuit

A signal transceiver circuit, a method of operating a signal transmitting circuit, and a method of setting a delay circuit are provided. The signal transceiver circuit is used to send an output signal and receive an input signal, and includes: a delay circuit for delaying a first clock to generate a second clock; a first digital-to-analog converter (DAC) for converting a first digital signal into the output signal according to the first clock; a second DAC for converting the first digital signal into an echo cancellation signal according to the second clock; an analog front-end circuit for receiving the input signal and the echo cancellation signal and generating an analog signal; and an analog-to-digital converter (ADC) for converting the analog signal into a second digital signal.

Non-line-of-sight (NLOS) coverage for millimeter wave communication

A system, in an active reflector device, adjusts a first amplification gain of each of a plurality of radio frequency (RF) signals received at a receiver front-end from a first equipment via a first radio path of an NLOS radio path. A first phase shift is performed on each of the plurality of RF signals with the adjusted first amplification gain. A combination of the plurality of first phase-shifted RF signals is split at a transmitter front-end. A second phase shift on each of the split first plurality of first phase-shifted RF signals is performed. The plurality of RF signals as a directed beam is transmitted to a second equipment via a second radio path of the NLOS radio path.

DELAY CIRCUIT FOR TIME OFFSETTING A RADIOFREQUENCY SIGNAL AND INTERFERENCE REDUCING DEVICE USING SAID CIRCUIT
20170353203 · 2017-12-07 ·

A delay circuit for time offsetting an input radiofrequency signal, includes an all-pass filter having a given central frequency to linearize a phase-shift of an output signal relative to the input signal as a function of the frequency on a first frequency range; and first and second antiresonant circuits having respectively first and second central frequencies, the all-pass filter and the antiresonant circuits configured to linearize the phase-shift of the output signal relative to the input signal as a function of the frequency on a second frequency range including the first range. The difference between first and second central frequencies is less than 30% of the value of one of both frequencies, the difference between the first central frequency and the given central frequency of the all-pass filter is less than 30% of the value of a highest frequency between the first central frequency and the given central frequency.

Segmented echo cancellation filter for use in full-duplex communication systems

Disclosed are systems, methods, and non-transitory computer-readable media for a segmented ECF that includes multiple filter components to replicate an echo pulse response. The different filter components are used to replicate different portions of the echo pulse response. Each filter components can include filter coefficients of different sizes based on the portions of the echo pulse response that is replicated by the filter component. For example, a filter component that replicates a portion of the echo pulse response that includes a large reflection can include large filter coefficients suitable to replicate the larger reflection. In contrast, a filter component that replicates a portion of the echo pulse response that includes smaller reflections can include smaller filter coefficients that are suitable to replicate the smaller reflection. The output of each of the filter components is combined to replicate the full echo pulse response.

SYSTEM ARCHITECTURE FOR SUPPORTING DIGITAL PRE-DISTORTION AND FULL DUPLEX IN CABLE NETWORK ENVIRONMENTS
20170244445 · 2017-08-24 · ·

An example apparatus for supporting digital pre-distortion (DPD) and full duplex (FDX) in cable network environments is provided and includes a first path for signals being transmitted out of the apparatus, a second path for signals being received into the apparatus, a DPD actuator located on the first path, an amplifier located on the first path, an echo cancellation (EC) actuator located on the second path, and a data interface including a plurality of channels connecting the apparatus to a signal processor. DPD coefficients, EC coefficients and delay parameters are provided over the data interface from the signal processor to the apparatus. The DPD actuator predistorts signals on the first path using the DPD coefficients compensating for distortions introduced by the amplifier, and the EC actuator reduces interferences in signals on the second path using the EC coefficients and the delay parameters, facilitating FDX communication by the apparatus.

Third order intermodulation distortion cancellation

Various embodiments relate to a cancellation circuit configured to generate a cancellation signal, including: an attenuator configured to attenuate a transmitted signal from an aggressor transmitter based upon a first attenuation value; an I/Q demodulator configured to split an attenuated signal into in-phase (I) and quadrature signals (Q); a phase interpolator configured to apply a calibration phase shift and a calibration attenuation to the I signal and Q signal and to recombine the I and Q signals; an auxiliary balun coupled to an output of the phase interpolator; and an auxiliary power amplifier with an input connected to the auxiliary balun configured to generate the cancellation signal, wherein the output of the auxiliary power amplifier is connected to an output of a victim transmitter.

Signal transceiver circuit, method of operating signal transmitting circuit, and method of setting delay circuit
20220200778 · 2022-06-23 ·

A signal transceiver circuit, a method of operating a signal transmitting circuit, and a method of setting a delay circuit are provided. The signal transceiver circuit is used to send an output signal and receive an input signal, and includes: a delay circuit for delaying a first clock to generate a second clock; a first digital-to-analog converter (DAC) for converting a first digital signal into the output signal according to the first clock; a second DAC for converting the first digital signal into an echo cancellation signal according to the second clock; an analog front-end circuit for receiving the input signal and the echo cancellation signal and generating an analog signal; and an analog-to-digital converter (ADC) for converting the analog signal into a second digital signal.

Transceiver
11652506 · 2023-05-16 · ·

A transceiver includes a first digital-to-analog converter (DAC), a second DAC, and a timing control module. In a calibration mode, the first DAC transmits a transmitting signal; the second DAC transmits an echo cancellation signal; and the timing control module, according to an echo signal of the transmitting signal and the echo cancellation signal, obtains a timing offset therebetween, and generates a first timing control signal and a second timing control signal to the first DAC and the second DAC according to the timing offset, respectively. The first DAC adjusts a transmission delay of transmitting the transmitting signal according to the first timing control signal, and/or the second DAC modifies a transmission delay of transmitting the echo cancellation signal according to the second timing control signal.