H04B3/235

A CONCEPT FOR INTERFERENCE CANCELLATION IN A TRANSCEIVER DEVICE
20220416827 · 2022-12-29 ·

The present disclosure is directed to improvements in interference mitigation for Adjacent Channel Leakage in wireline communication, and more specifically, but not exclusively, to improved kernel designs that can facilitate interference mitigation for Adjacent Channel Leakage in cable modem systems. Examples of the present disclosure provide an apparatus for a transceiver device that comprises interference cancellation circuitry configured to cancel interference caused by upstream signals in one or more upstream sub-bands on one or more downstream sub-bands based on a combination of a plurality of kernels. The interference is at least partially caused by non-linearities within a transmission circuitry of the transceiver device, the plurality of kernels representing the non-linearities within the transmission circuitry of the transceiver device. Each of the kernels comprises one or more associated terms, with each of the associated terms being in-band for at least one of the one or more downstream sub-bands.

Echo cancelling system and echo cancelling method

An echo cancelling system includes a data transmitter circuit and an echo canceller circuit. The data transmitter circuit is configured to receive a first transmitted signal. The first transmitted signal has a first sampling rate. The echo canceller circuit is configured to generate a second transmitted signal according to the first transmitted signal. The second transmitted signal has a second sampling rate. The second sampling rate is greater than the first sampling rate. The echo canceller circuit is further configured to generate an echo cancelling signal according to the second transmitted signal. The data transmitter circuit is further configured to generate an output signal according to a received signal and the echo cancelling signal.

Adaptive equalizer, acoustic echo canceller device, and active noise control device

A variable update step size is determined in proportion to a magnitude ratio or magnitude difference between a first residual signal and a second residual signal. The first residual signal is obtained by using adaptive filter coefficient sequence, where the adaptive filter coefficient sequence has been obtained in previous operations of the adaptive equalizer. The second residual signal is obtained by using a prior update adaptive filter coefficient sequence, where the prior update adaptive filter coefficient sequence is obtained by performing a coefficient update with an arbitrary prior update step size on the adaptive filter coefficient sequence having been obtained in previous operations of the adaptive equalizer.

Microreflection delay estimation in a CATV network

Systems and methods of estimating a distance to a cause of a micro-reflection in a CATV network.

ETHERNET PHYSICAL LAYER TRANSCEIVER WITH NON-LINEAR NEURAL NETWORK EQUALIZERS
20220239510 · 2022-07-28 ·

A physical layer transceiver for connecting a host device to a wireline channel medium includes a host interface for coupling to the host device, a line interface for coupling to the channel medium, a transmit path operatively coupled to the host interface and the line interface, a receive path operatively coupled to the line interface and the host interface, and adaptive filter circuitry operatively coupled to at least one of the transmit path and the receive path for filtering signals on the at least one of the transmit path and the receive path, the adaptive filter circuitry including a non-linear equalizer. The non-linear equalizer may be a neural network equalizer based on a multi-layer perceptron or a radial-basis function, or may be a linear equalizer with a non-linear activation function. The non-linear equalizer also may have a front-end filter to reduce input complexity.

Ethernet transceiver with PHY-level signal-loss detector
11343061 · 2022-05-24 · ·

An Ethernet transceiver includes physical-layer (PHY) circuitry and a signal-loss detector. The PHY circuitry is configured to receive a signal from a peer transceiver, to process the received signal in a series of digital PHY-level processing operations, and to output the processed signal for Medium Access Control (MAC) processing. The signal-loss detector is configured to receive, from the PHY circuitry, a digital version of the received signal, and to detect a signal-loss event based on an amplitude of the digital version of the received signal.

ECHO CANCELLING SYSTEM AND ECHO CANCELLING METHOD
20210367640 · 2021-11-25 ·

An echo cancelling system includes a data transmitter circuit and an echo canceller circuit. The data transmitter circuit is configured to receive a first transmitted signal. The first transmitted signal has a first sampling rate. The echo canceller circuit is configured to generate a second transmitted signal according to the first transmitted signal. The second transmitted signal has a second sampling rate. The second sampling rate is greater than the first sampling rate. The echo canceller circuit is further configured to generate an echo cancelling signal according to the second transmitted signal. The data transmitter circuit is further configured to generate an output signal according to a received signal and the echo cancelling signal.

Transceiver and operation method of the same

The present invention provides a transceiver. The transistor is coupled to a transmission line. The transceiver includes a variable resistor set, a transmitter module, a receiver module, and a digital signal processor. The transmitter module has an output terminal coupled to the variable resistor set and the transmission line. The transmitter module includes a first digital-to-analog converter configured to output an emission current. The receiver module has an input terminal coupled to the transmitter module and the transmission line. When the emission current is fed into the transmission line, a far-end echo is fed into the receiver module. An amplitude of the far-end echo is associated with a resistance value of the transmission line. The digital signal processor adjusts a current value of the emission current from a first default current value to a second default current value based on the amplitude of the far-end echo.

Full-duplex cancellation

Facilitating echo cancellation within communication networks is contemplated, such as but not necessarily limited to facilitating echo cancellation within full-duplex (FDX) communication networks. The echo cancellation may optionally be performed with an echo canceller included as part of or otherwise associated with an FDX node used to facilitate interfacing signaling between a digital domain and an analog domain of a FDX or other communication network.

TRANSCEIVER AND OPERATION METHOD OF THE SAME

The present invention provides a transceiver. The transistor is coupled to a transmission line. The transceiver includes a variable resistor set, a transmitter module, a receiver module, and a digital signal processor. The transmitter module has an output terminal coupled to the variable resistor set and the transmission line. The transmitter module includes a first digital-to-analog converter configured to output an emission current. The receiver module has an input terminal coupled to the transmitter module and the transmission line. When the emission current is fed into the transmission line, a far-end echo is fed into the receiver module. An amplitude of the far-end echo is associated with a resistance value of the transmission line. The digital signal processor adjusts a current value of the emission current from a first default current value to a second default current value based on the amplitude of the far-end echo.