An error rate measuring apparatus includes a data transmission unit that transmits a test signal of a known pattern and a parameter value defined by a communication standard to a device under test, and a bit error measurement unit that measures a bit error of a signal transmitted from the device under test. The data transmission unit sequentially changes the parameter value and transmits the parameter value to the device under test. The bit error measurement unit measures a bit error of a signal transmitted from the device under test corresponding to the parameter value. The error rate measuring apparatus further includes a discrimination unit that discriminates a parameter value at which the number of bit errors is the least in a measurement result of the bit error measurement unit, as an optimum value of emphasis of an output waveform of the device under test.

The present invention relates to an input/output signal synchronization method by a radio frequency unit. The input/output signal synchronization method according to the present invention comprises the steps of: generating a transmitter (Tx) input signal by adding, to a baseband signal, a test signal located at a frequency out of an operation frequency range of the radio frequency unit; collecting the Tx input signal and a Tx output signal obtained by outputting the input signal through a Tx function block; and synchronizing the Tx input signal and the Tx output signals, based on a result obtained by the collecting.

Techniques for testing a networked system using simulated abnormal node failure are disclosed. In some embodiments, a computer system performs operations comprising: repeatedly transmitting simulated requests to a networked system on which a software application is implemented using a plurality of nodes, the networked system being configured to respond to the simulated requests using the plurality of nodes; randomly selecting one or more nodes from the plurality of nodes; terminating the randomly selected one or more nodes; restarting the terminated randomly selected one or more nodes; repeating the randomly selecting one or more nodes, the terminating the randomly selected one or more nodes, and the restarting the terminated randomly selected one or more nodes until each one of the plurality of nodes has been terminated and restarted at least once during the first period of time; and determining response times of the networked system in responding to the simulated requests.

Techniques for testing a networked system using simulated abnormal node failure are disclosed. In some embodiments, a computer system performs operations comprising: repeatedly transmitting simulated requests to a networked system on which a software application is implemented using a plurality of nodes, the networked system being configured to respond to the simulated requests using the plurality of nodes; randomly selecting one or more nodes from the plurality of nodes; terminating the randomly selected one or more nodes; restarting the terminated randomly selected one or more nodes; repeating the randomly selecting one or more nodes, the terminating the randomly selected one or more nodes, and the restarting the terminated randomly selected one or more nodes until each one of the plurality of nodes has been terminated and restarted at least once during the first period of time; and determining response times of the networked system in responding to the simulated requests.

Aspects of the invention include a driver arranged at a stand-alone receiver that is configured to receive a binary sequence from a pseudorandom binary sequence (PRBS) generator arranged at the receiver. The driver is configured to adjust the signal characteristics of the binary sequence to simulate channel loss at the receiver. The driver is further configured to output the adjusted binary sequence to a downstream data path of the receiver to enable the receiver to perform a self-test.

Presented are systems and methods for automatically creating and labeling training data for training-based radio, comprising receiving, at a receiver, a frame that comprises a modulated radio frequency (RF) signal comprising a set of waveforms that correspond to payload data. The payload data comprises a sequence of random bits. In embodiments, until a stopping condition is met one or more steps are performed, comprising detecting the frame; demodulating the modulated RF signal to reconstruct the sequence of random bits; using the reconstructed sequence to determine whether the payload data has been correctly received; in response to determining that the payload data has not been correctly received, discarding it and, otherwise, accepting the sequence of random bits as a training label; associating the training label with the modulated RF signal to generate labeled training data; and appending the labeled training data to a labeled training data set.

A multi-lane transmitting apparatus includes lanes, and each lane includes a serializer circuit to convert parallel bits to serial bits. A clock signal generator generates a first clock signal having phases. A deserializer circuit converts serial bits to parallel bits. A Built-In Self-Test (BIST) circuit includes a signal generator circuit for generating a signal having bits in a defined pattern. A comparator circuit compares a pattern of bits of an output signal with the defined pattern. A BIST lane circuit monitors a status of the lanes. A BIST central circuit receives the status and determines if a number of lanes having an unmatched status is less than a threshold value. A phase extrapolator circuit adjusts a phase of the first clock signal when the number of the lanes is less than the threshold value.

Embodiments described herein generally relate to measuring and evaluating a test signal generated by a device under test (DUT). In particular, the test signal generated by the DUT may be compared to a reference signal and scored based on the comparison. For example, a method may include: capturing a test signal from a device under test; splicing the test signal into a plurality of test audio files based on a plurality of frequency bins; at each frequency bin, comparing each of the plurality of test audio files to a corresponding reference audio file from among a plurality of reference audio files, the plurality of reference audio files being associated with a reference signal; and calculating a performance score of the device under test based on the comparisons.

A multi-lane transmitting apparatus includes lanes, and each lane includes a serializer circuit to convert parallel bits to serial bits. A clock signal generator generates a first clock signal having phases. A deserializer circuit converts serial bits to parallel bits. A Built-In Self-Test (BIST) circuit includes a signal generator circuit for generating a signal having bits in a defined pattern. A comparator circuit compares a pattern of bits of an output signal with the defined pattern. A BIST lane circuit monitors a status of the lanes. A BIST central circuit receives the status and determines if a number of lanes having an unmatched status is less than a threshold value. A phase extrapolator circuit adjusts a phase of the first clock signal when the number of the lanes is less than the threshold value.

There are provided a data comparison unit that detects an FEC symbol error of a signal under test output from a DUT in accordance with an input of a jitter signal, an error counting unit that counts the number of detected FEC symbol errors for each codeword for each phase modulation amount, a codeword classification unit that classifies a plurality of codewords included in the signal under test into a plurality of groups based on the counted number of FEC symbol errors, a codeword number counting unit that counts the number of codewords in each group for each phase modulation amount, and a display control unit that controls a display of a first graph having a horizontal axis as the phase modulation amount and a vertical axis as a ratio of the number of codewords in each group, on a display screen.