H04L2001/0094

Method and device for serial data transmission having a flexible message size and a variable bit length
09852106 · 2017-12-26 · ·

A method for serial data transfer in a bus system having at least two bus subscribers that exchange messages via the bus, the transmitted messages having a logical structure according to CAN standard ISO 11898-1, the logical structure encompassing a start of frame bit, arbitration field, control field, data field, CRC field, acknowledge field, and end of frame sequence, the control field encompassing a data length code that contains an information item regarding the length of the data field. The method is characterized in that when a first marker (EDL) is present, the control field of the messages, divergently from ISO 11898-1, encompasses more than six bits; the first marker (EDL) being implemented by way of a recessive bit in the control field, and when the first marker is present, the recessive bit of the first marker (EDL) being followed, in all data messages, by at least one dominant bit.

BACKWARD-COMPATIBLE FORWARD ERROR CORRECTION METHOD AND SYSTEM FOR BURST ERRORS AND ERASURES
20230198665 · 2023-06-22 · ·

An aspect of the invention is directed to a method of communicating data over a network, comprising: generating, by a first node, a frame addressed to a second node; encoding, by the first node, the generated frame by applying forward error correction (FEC) coding on the generated frame in such manner that blocks or removes a predetermined set of forbidden symbols (FS) from the encoded frame; and transmitting, by the first node, the encoded frame to the second node. A second aspect of the invention is directed to a method for communicating data over a mixing segment of an Ethernet network by using node A and node B communicatively connected to the mixing segment. According to the second aspect, the method comprises generating, by node A, an Ethernet frame E addressed to a node B; applying, by node A, a Reed-Solomon -type encoding to the Ethernet frame E to generate an encoded Ethernet frame E′; transmitting, by node A, the encoded Ethernet frame E′ over the mixing segment; receiving, by node B, from the mixing segment the encoded Ethernet frame E′; and applying, by node B, a Reed-Solomon-type decoding to the Ethernet frame E′ to obtain a forward error correction representative of the original Ethernet frame E. In this second aspect, Reed-Solomon encoding may be applied by generating a list of forbidden symbols FS and, when applying the Reed-Solomon control symbols to the Ethernet frame E, removing or blocking the forbidden symbols FS from the encoded Ethernet frame E′

Enabling Use Of Non-Volatile Media-Express (NVME) Over A Network
20230185746 · 2023-06-15 ·

Enabling a protocol for efficiently and reliably using the NVME protocol over a network, referred to as NVME over Network, or NVMEoN, may include an NVMEoN exchange layer for handling exchanges between initiating and target nodes on a network, a burst transmission protocol that provides guaranteed delivery without duplicate retransmission, and an exchange status block approach to manage state information about exchanges.

Data transmission method and apparatus having data reuse mechanism
11509428 · 2022-11-22 · ·

The present invention discloses a data transmission method having data reuse mechanism that includes the steps outlined below. A driver corresponding to a communication circuit is operated as a transmission terminal to analyze under-transmitted data to generate reuse setting information, indication information and packets having a complete packet and incomplete packets so as to be transmitted by the transmission terminal through a transmission interface to be received by the communication circuit as a receiving terminal. The receiving terminal identifies the complete packet and the incomplete packets according to the indication information. A data location that a reusable data section corresponds to is determined according to the reuse information. The complete packet is outputted. A non-reusable data section of each of the incomplete packets and the reusable data section of the complete packet are reconstructed to output reconstructed packets according to the data location.

MULTICHIP PACKAGE LINK ERROR DETECTION

First data is received on a plurality of data lanes of a physical link and a stream signal corresponding to the first data is received on a stream lane identifying a type of the first data. A first instance of an error detection code of a particular type is identified in the first data. Second data is received on at least a portion of the plurality of data lanes and a stream signal corresponding to the second data is received on the stream lane identifying a type of the second data. A second instance of the error detection code of the particular type is identified in the second data. The stream lane is another one of the lanes of the physical link and, in some instance, the type of the second data is different from the type of the first data.

Adaptive rate control of NBASE-T data transport system
09807208 · 2017-10-31 · ·

A 10GBASE-T circuit is disclosed. The circuit includes a physical (PHY) integrated circuit and a media access control (MAC) integrated circuit. The PHY couples to a data transfer medium and carries out data transfers at a PHY data rate. The MAC integrated circuit controls access to the date transfer medium and couples to the PHY via a bidirectional link operating at a MAC data rate. Rate control logic detects the PHY data rate, and adjusts the MAC data rate to the PHY data rate. Changes to the PHY and MAC data rates may be made at rates higher than 1 Gbps.

Communication device, router having communication device, bus system, and circuit board of semiconductor circuit having bus system

A communication device includes: a receiving terminal; a storage device which stores a rule in which a condition regarding a bus system operation environment and an error tolerance scheme are associated with each other, and information regarding a path length; an error processor which determines the error tolerance scheme by utilizing the condition regarding the bus system operation environment and the rule so as to generate error tolerance information corresponding to the received data according to the determined error tolerance scheme; and a sending terminal for sending at least one packet including the error tolerance information and the data to the bus. The operation environment-related condition is a condition for granting an error tolerance for a transmission path of which a bus path length to another communication device, which is a destination of the data, is greater than a predetermined value.

Method for Serially Transmitting a Frame from a Transmitter to at Least One Receiver via a Bus System, and a Subscriber Station for a Bus System

The disclosure relates to a method for serially transmitting a frame from a transmitter to at least one receiver via a bus line, as well as a subscriber station for a bus system. According to said method, stuff bits for generating additional signal edges are inserted into the frame by the transmitter according to a predetermined rule, and the stuff bits are removed again by the receiver when evaluating a received frame, a CRC calculation logic of a CRC generator calculating a CRC checksum that is comprised by said frame, and a value of “1” being inserted into said CRC calculation logic in an additional evaluation step if a value of “0 . . . 0” has been determined for the CRC checksum in the running calculation executed by the CRC calculation logic.

Method for Serially Transmitting a Frame from a Transmitter to at Least One Receiver by Means of a Bus System, and a Subscriber Station for a Bus System

The disclosure relates to a method for serially transmitting a frame from a transmitter to at least one receiver by means of a bus line, as well as a subscriber station for a bus system. According to said method, stuff bits are inserted into the frame by the transmitter according to a predetermined rule in order to generate additional signal edges, and/or said stuff bits are removed again by the receiver when evaluating the frame, at least one item of information relating to a subsection of the frame additionally being added, and transmitted, outside of this subsection, and said subsection containing a predetermined sequence of bit values.

TIME OFFSET VALIDATION OF COMPONENTS WITH INDEPENDENT SILICON CLOCKS
20170288818 · 2017-10-05 ·

In accordance with embodiments disclosed herein, there is provided systems and methods for time offset validation of components with independent silicon clocks. A requesting component includes transmission logic to transmit timing protocol requests to a responding component, receiving logic to receive timing protocol responses, replay detection logic to detect a retransmission of a timing protocol message and to set an internal timing state of the requesting component as invalid, and validation logic to detect at least two consecutive timing protocol dialogs and set the internal timing state of the requesting component as valid. A responding component includes receiving logic, transmission logic, replay detection logic to detect a retransmission of a timing protocol message and set an internal timing state of the responding component as invalid, and validation logic to detect at least two consecutive timing protocol dialogs and set the internal timing state of the responding component as valid.