Devices, systems and methods that reduce funneling noise in upstream data transmissions from modems providing the transmissions through respective RF legs connected to the node. Preferred devices and systems may include a node that is configured to selectively isolate respectively scheduled upstream data signals from noise present on any RF leg not propagating a scheduled upstream data signal.

A facility is equipped with floor tiles, each tile having several segments, each segment with an antenna. Each segment on a tile is associated with a particular timeslot. A transmitter at the tile transmits on a specific frequency. During the particular timeslot for that segment, a signal at the specific frequency is transmitted and radiated from the antenna for that segment. A user electromagnetically couples to one or more antennas of the tile, acting as a signal path for the signal. A receiver in a second tile detects the signal, and information about the frequency detected, timeslot for the signal, and relative signal strength is generated. Where the user has stepped from is determined using the information. By concatenating these steps, a path of the user may be determined. Receivers in shelves facilitate disambiguation of one user from another when interacting with items.

Radio-frequency (RF) integrated circuit (RFIC) chip(s) allow for the integration of multiple electronic circuits on a chip to provide distributed antenna system functionalities. RFIC chips are employed in central unit and remote unit components, reducing component cost and size, increasing performance and reliability, while reducing power consumption. The components are also easier to manufacture. The RFIC chip(s) can be employed in distributed antenna systems and components that support RF communications services and/or digital data services.

Radio-frequency (RF) integrated circuit (RFIC) chip(s) allow for the integration of multiple electronic circuits on a chip to provide distributed antenna system functionalities. RFIC chips are employed in central unit and remote unit components, reducing component cost and size, increasing performance and reliability, while reducing power consumption. The components are also easier to manufacture. The RFIC chip(s) can be employed in distributed antenna systems and components that support RF communications services and/or digital data services.

The present invention relates to wireless network technologies, and particularly to a chain-type wireless sensor network-oriented hybrid media access control (MAC) method. The present invention fully considers features of a chained or linear topology of a wireless sensor network applied in power transmission line monitoring and the like, adopts different access policies at different periods of the network, and proposes a method of time division access control Pipelined TDMA during busy periods and contention access control S-XMAC during idle periods. During busy periods, a pipelined scheduling transmission method is used to avoid the problem of hidden terminals so as to improve transmission reliability and resource utilization. During idle periods, different MAC parameters are set for cluster head members and ordinary cluster members, so that the cluster head members can respond to requests in a more timely manner, and meanwhile, the ordinary cluster members save energy as much as possible, thereby meeting requirements for network real-time quality of the application system while saving energy of the network.

Radio-frequency (RF) integrated circuit (RFIC) chip(s) allow for the integration of multiple electronic circuits on a chip to provide distributed antenna system functionalities. RFIC chips are employed in central unit and remote unit components, reducing component cost and size, increasing performance and reliability, while reducing power consumption. The components are also easier to manufacture. The RFIC chip(s) can be employed in distributed antenna systems and components that support RF communications services and/or digital data services.

Devices, systems and methods that reduce funneling noise in upstream data transmissions from modems providing the transmissions through respective RF legs connected to the node. Preferred devices and systems may include a node that is configured to selectively isolate respectively scheduled upstream data signals from noise present on any RF leg not propagating a scheduled upstream data signal.

A process for allowing a Concurrent Multi-Netting (CMN-4) equipped Link 16 terminal to enter an active network. After an initial entry command is entered at the terminal at a given current time at the terminal, a number of time slots are identified in which multiple receivers at the terminal have an opportunity to detect an initial entry message (IEM) after the given current time. Each of the receivers is set to detect an IEM during a different one of the identified time slots. When an IEM is first detected by one of the receivers, the current time at the terminal is reset based on the time slot in which the IEM was detected.

Radio-frequency (RF) integrated circuit (RFIC) chip(s) allow for the integration of multiple electronic circuits on a chip to provide distributed antenna system functionalities. RFIC chips are employed in central unit and remote unit components, reducing component cost and size, increasing performance and reliability, while reducing power consumption. The components are also easier to manufacture. The RFIC chip(s) can be employed in distributed antenna systems and components that support RF communications services and/or digital data services.

The invention includes, among other things, a system for passing TDM traffic through a packet switch. In one embodiment, the system includes a packet switch that has a plurality of data ports and is capable of routing FSDU packets between the plurality of data ports. A TDM encapsulation circuit process a TDM data flow that is incoming to the switch. A circuit demultiplexer processes the incoming data flow to buffer data associated with different TDM circuits into different buffer locations. A timer monitors the amount of time available to fill the FSDU, and when the time period reaches the frame boundary, an FSDU generator generates an FSDU that is filled with data associated with the TDM circuits. Header information is added for allowing the packet switch to route the generated FSDU to a port associated with the respective TDM circuit.