Patent classifications
H04L2027/0036
SYNCHRONOUSLY-SWITCHED MULTI-INPUT DEMODULATING COMPARATOR
Methods and systems are described for obtaining a set of carrier-modulated symbols of a carrier-modulated codeword, each carrier-modulated symbol received via a respective wire of a plurality of wires of a multi-wire bus, applying each carrier-modulated symbol of the set of carrier-modulated symbols to a corresponding transistor of a set of transistors, the set of transistors further connected to a pair of output nodes according to a sub-channel vector of a plurality of mutually orthogonal sub-channel vectors, recovering a demodulation signal from the carrier-modulated symbols, and generating a demodulated sub-channel data output as a differential voltage on the pair of output nodes based on a linear combination of the set of carrier-modulated symbols by controlling conductivity of the set of transistors according to the demodulation signal.
Synchronously-switched multi-input demodulating comparator
Methods and systems are described for obtaining a set of carrier-modulated symbols of a carrier-modulated codeword, each carrier-modulated symbol received via a respective wire of a plurality of wires of a multi-wire bus, applying each carrier-modulated symbol of the set of carrier-modulated symbols to a corresponding transistor of a set of transistors, the set of transistors further connected to a pair of output nodes according to a sub-channel vector of a plurality of mutually orthogonal sub-channel vectors, recovering a demodulation signal from the carrier-modulated symbols, and generating a demodulated sub-channel data output as a differential voltage on the pair of output nodes based on a linear combination of the set of carrier-modulated symbols by controlling conductivity of the set of transistors according to the demodulation signal.
ANTI-ALIASING CHANNEL ESTIMATION APPARATUS AND METHOD AND RECEIVER
An anti-aliasing channel estimation apparatus and method and a receiver where the anti-aliasing channel estimation method includes: performing clock recovery and data synchronization on a received multicarrier signal with channel aliasing, to obtain a synchronized time-domain signal and a sampling phase; calculating an estimation signal after passing through a channel and being aliased based on a training sequence and the sampling phase, and obtaining a channel response and an aliasing signal response of each subcarrier of the multicarrrier signal based on the estimation signal and the frequency-domain signal. Therefore, channel estimation may be performed on the multicarrier signal with channel aliasing, influence of the channel aliasing on the bit error rate may be lowered, and transmission quality of the system may be improved.
RXLOS DEGLITCH APPARATUS AND METHOD
A RXLOS deglitch apparatus for a receiver is provided. The RXLOS deglitch apparatus includes a sampler, an edge detecting unit and a finite state machine. The sampler receives a recovered clock, and samples a RXLOS signal according to the recovered clock. Consequently, a sampled RXLOS signal is generated. The edge detecting unit receives the RXLOS signal. When a logic level of the RXLOS signal is changed, an edge detection signal is activated by the edge detecting unit. The finite state machine receives the edge detection signal and the sampled RXLOS signal, generates an edge rest signal to control the edge detecting unit, and outputs a filtered RXLOS signal.
PROBABILISTIC SHAPING QAM DYNAMIC EQUALIZATION AND DIGITAL SIGNAL PROCESSING METHOD
Probabilistic shaping quadrature amplitude modulation (QAM) based on Maxwell-Boltzmann distribution is particularly important in coherent optical communication, which can approach the Shannon limit more desirably in the case of a finite signal-to-noise ratio. However, standard coherent optical digital signal processing algorithms are not optimal for demodulation of PS higher-order QAM signals. The invention provides a probabilistic shaping QAM dynamic equalization method that intercepts multiple inner rings after clock recovery and updates the convergence radius and area of a conventional blind dynamic channel equalization algorithm using a peak density K-means clustering algorithm. The clustering algorithm gives centroid labels and a quantity of classifications required for K-means, which does not require a large number of iterations of K-means, thereby reducing the complexity and improving the accuracy. The updated decision area and decision radius reduce errors in the dynamic equalization algorithm, thereby improving the accuracy of probabilistic shaping QAM digital signal processing.
FREQUENCY OFFSET ESTIMATION
A receiver comprises a matched filter bank, decision logic and a frequency offset estimator. The matched filter bank comprises an input for receiving data representative of a frequency- or phase-modulated signal. The decision logic generates a sequence of demodulated symbol values from outputs of the matched filter bank. The frequency offset estimator determines a first phase value from a first output and a second phase value from a second output of the matched filter bank, the second output being offset from the first by L symbol periods. It also determines a phase adjustment value from an L-symbol subsequence within the sequence of demodulated symbol values, each subsequence value being determined from values output by the matched filter bank between the first and second outputs. It estimates a frequency offset based on the difference between the first phase value plus the phase adjustment value, and the second phase value.
SYNCHRONOUSLY-SWITCHED MULTI-INPUT DEMODULATING COMPARATOR
Methods and systems are described for obtaining a set of carrier-modulated symbols of a carrier-modulated codeword, each carrier-modulated symbol received via a respective wire of a plurality of wires of a multi-wire bus, applying each carrier-modulated symbol of the set of carrier-modulated symbols to a corresponding transistor of a set of transistors, the set of transistors further connected to a pair of output nodes according to a sub-channel vector of a plurality of mutually orthogonal sub-channel vectors, recovering a demodulation signal from the carrier-modulated symbols, and generating a demodulated sub-channel data output as a differential voltage on the pair of output nodes based on a linear combination of the set of carrier-modulated symbols by controlling conductivity of the set of transistors according to the demodulation signal.
Radiofrequency carrier tracking for amplitude-modulated signals with an unstable reference clock
Techniques are described for accurate tracking of a radiofrequency (RF) carrier for amplitude-modulated signals in unstable reference clock environments. For example, some embodiments operate in context of clock circuits in devices configured for near-field communication (NFC) card emulation (CE) mode. The clock circuits seek to generate an internal clocking signal by tracking a clock reference, such as an RF carrier. In some cases, the clock reference can unpredictably become unreliable for periods of time, during which continued tracking of the unreliable clock reference can yield appreciable frequency and phase errors in the generated internal clocking signal. Embodiments implement phase delta detection with time limiting to limit the magnitude of such errors in the internal clocking signal introduced while tracking an unreliable clock reference. For example, embodiments force gating of phase tracking signals to limit their duration, thereby limiting impacts of those phase tracking signals on the clock circuit output.
Synchronously-switched multi-input demodulating comparator
Methods and systems are described for obtaining a set of carrier-modulated symbols of a carrier-modulated codeword, each carrier-modulated symbol received via a respective wire of a plurality of wires of a multi-wire bus, applying each carrier-modulated symbol of the set of carrier-modulated symbols to a corresponding transistor of a set of transistors, the set of transistors further connected to a pair of output nodes according to a sub-channel vector of a plurality of mutually orthogonal sub-channel vectors, recovering a demodulation signal from the carrier-modulated symbols, and generating a demodulated sub-channel data output as a differential voltage on the pair of output nodes based on a linear combination of the set of carrier-modulated symbols by controlling conductivity of the set of transistors according to the demodulation signal.
SYNCHRONOUSLY-SWITCHED MULTI-INPUT DEMODULATING COMPARATOR
Methods and systems are described for obtaining a set of carrier-modulated symbols of a carrier-modulated codeword, each carrier-modulated symbol received via a respective wire of a plurality of wires of a multi-wire bus, applying each carrier-modulated symbol of the set of carrier-modulated symbols to a corresponding transistor of a set of transistors, the set of transistors further connected to a pair of output nodes according to a sub-channel vector of a plurality of mutually orthogonal sub-channel vectors, recovering a demodulation signal from the carrier-modulated symbols, and generating a demodulated sub-channel data output as a differential voltage on the pair of output nodes based on a linear combination of the set of carrier-modulated symbols by controlling conductivity of the set of transistors according to the demodulation signal.