H04L2203/02

Data-driven phase detector element for phase locked loops
11632114 · 2023-04-18 · ·

Generating a composite interpolated phase-error signal for clock phase adjustment of a local oscillator by forming a summation of weighted phase-error signals generated using a matrix of partial phase comparators, each of which compare a phase of the local oscillator with a corresponding phase of a reference clock.

Matrix phase interpolator for phase locked loop
11245402 · 2022-02-08 · ·

Generating a composite interpolated phase-error signal for clock phase adjustment of a local oscillator by forming a summation of weighted phase-error signals generated using a matrix of partial phase comparators, each of which compare a phase of the local oscillator with a corresponding phase of a reference clock.

DATA-DRIVEN PHASE DETECTOR ELEMENT FOR PHASE LOCKED LOOPS
20220166434 · 2022-05-26 ·

Generating a composite interpolated phase-error signal for clock phase adjustment of a local oscillator by forming a summation of weighted phase-error signals generated using a matrix of partial phase comparators, each of which compare a phase of the local oscillator with a corresponding phase of a reference clock.

MATRIX PHASE INTERPOLATOR FOR PHASE LOCKED LOOP
20210320662 · 2021-10-14 ·

Generating a composite interpolated phase-error signal for clock phase adjustment of a local oscillator by forming a summation of weighted phase-error signals generated using a matrix of partial phase comparators, each of which compare a phase of the local oscillator with a corresponding phase of a reference clock.

Matrix phase interpolator for phase locked loop
11018675 · 2021-05-25 · ·

Generating a composite interpolated phase-error signal for clock phase adjustment of a local oscillator by forming a summation of weighted phase-error signals generated using a matrix of partial phase comparators, each of which compare a phase of the local oscillator with a corresponding phase of a reference clock.

Phase rotation circuit for eye scope measurements
10965290 · 2021-03-30 · ·

Methods and systems are described for generating, with a local oscillator and an adjustable phase interpolator, a data-sampling clock and a variable-phase-offset eye-measurement clock, forming a received data signal using a multi-input comparator, generating, using a data slicer and the data sampling clock, a receive sample of the received data signal, and generating, using at least one eye slicer and the variable-phase-offset eye-measurement clock, a plurality of eye characteristic measurements by adjusting a sampling threshold of the at least one eye slicer and a phase offset of the variable-phase-offset eye-measurement clock.

Polar transmitter with zero crossing avoidance

A polar transmitter and method thereof generate a filtered IQ waveform in IQ space representing an input bit stream. The filtered IQ waveform is modified to avoid a zero crossing region by intermittently adding thereto a zero crossing avoidance signal with a frequency spectrum comprising at least first and second tones defining first and second peaks on opposite sides of a center-frequency valley. A polar signal comprising a polar amplitude and phase is generated based on the modified IQ waveform. An RF carrier is modulated using the polar signal.

POLAR TRANSMITTER WITH ZERO CROSSING AVOIDANCE
20200153674 · 2020-05-14 ·

A polar transmitter and method thereof generate a filtered IQ waveform in IQ space representing an input bit stream. The filtered IQ waveform is modified to avoid a zero crossing region by intermittently adding thereto a zero crossing avoidance signal with a frequency spectrum comprising at least first and second tones defining first and second peaks on opposite sides of a center-frequency valley. A polar signal comprising a polar amplitude and phase is generated based on the modified IQ waveform. An RF carrier is modulated using the polar signal.

MATRIX PHASE INTERPOLATOR FOR PHASE LOCKED LOOP
20200007131 · 2020-01-02 ·

Methods and systems are described for receiving, at a data-driven phase comparator circuit, a plurality of data signals in parallel and one or more phases of a local oscillator signal, the data-driven phase comparator circuit comprising a plurality of partial phase comparators, generating a plurality of partial phase-error signals using the partial phase comparators, each partial phase-error signal generated by receiving (i) a corresponding phase of the local oscillator signal and (ii) a corresponding data signal of the plurality of data signals and responsive to a determination that a transition occurred in the corresponding data signal, generating the partial phase-error signal based on a comparison of the corresponding phase of the local oscillator signal and the corresponding data signal, and generating a composite phase-error signal by summing the plurality of partial phase error signals for setting a local oscillator in a lock condition.

Polar transmitter with zero crossing avoidance

A polar transmitter and method thereof generate a filtered IQ waveform in IQ space representing an input bit stream. The filtered IQ waveform is modified to avoid a zero crossing region by intermittently adding thereto a zero crossing avoidance signal with a frequency spectrum comprising at least first and second tones defining first and second peaks on opposite sides of a center-frequency valley. A polar signal comprising a polar amplitude and phase is generated based on the modified IQ waveform. An RF carrier is modulated using the polar signal.