A method for receiving a signal by integer forcing in a wireless communication system is provided. The method includes receiving one or more signals through a plurality of antennas, filtering the received one or more signals using a forcing matrix, generating codewords by remapping the filtered one or more signals, acquiring a summed codeword by performing a modulo operation on the codewords, decoding the summed codeword, and acquiring original codewords by performing an inversion operation on the decoded summed codeword.

An interconnect module device is provided. The interconnect module device includes a line control command (LCC) detecting circuit configured to identify an LCC signal; an equalizer control circuit configured to generate a control signal based on the LCC signal; a receiving equalizer configured to perform receiving equalization on a first signal received from a first universal flash storage (UFS) device based on the control signal to generate a second signal; and a transmitting equalizer configured to perform transmitting equalization on the second signal to generate a third signal based on the control signal, and transmit the third signal to a second UFS device.

An apparatus and associated methodology providing read channel circuitry having a signal equalizer that sends an equalized signal to a bit detector. The read channel circuitry is capable of sampling values of the equalized signal to identify a bit transition from among a predefined plurality of different bit transitions. The apparatus may have channel optimization (CO) logic that, based on the input signal and the sampling of the equalized signal, defines first values for a programmable parameter of the bit detector that substantially maximizes vector separations among vectors of waveform target samples corresponding to the predefined plurality of different bit transitions, while the CO logic also defines second values for a programmable parameter of the equalizer that substantially minimizes the mean squared separation of the equalized signal segment for each bit transition from the waveform target corresponding to that bit transition.

An interconnect module device is provided. The interconnect module device includes a line control command (LCC) detecting circuit configured to identify an LCC signal; an equalizer control circuit configured to generate a control signal based on the LCC signal; a receiving equalizer configured to perform receiving equalization on a first signal received from a first universal flash storage (UFS) device based on the control signal to generate a second signal; and a transmitting equalizer configured to perform transmitting equalization on the second signal to generate a third signal based on the control signal, and transmit the third signal to a second UFS device.

A transmission station device includes a training signal generation unit, a CP addition unit, and a transmission beamforming unit that performs transmission beamforming processing in a time domain using a transmission weight for removing inter-antenna interference. A reception station device includes a CP removal unit, a channel estimation unit, and an equalization unit that performs equalization processing for removing inter-symbol interference in a frequency domain using a reception weight. Either of the transmission station device or the reception station device is provided with a weight calculation unit that calculates the transmission weight and the reception weight based on the channel response, an effective CIR length calculation unit that calculates an effective CIR length between antennas, and a CP length setting unit that sets, to the CP length, a maximum CIR length among the CIR lengths of respective items of the reception weight.

A receiver for a passive optical network is provided. The receiver includes an analog-to-digital converter circuitry configured generate a digital receive signal based on an analog receive signal. The analog receive signal is based on an optical receive signal encoded with a binary transmit sequence. The receiver additionally comprises linear equalizer circuitry configured to generate an equalized receive signal by linearly equalizing the digital receive signal. Further, the receiver comprises secondary equalizer circuitry configured to generate soft information indicating a respective reliability of elements in the equalized receive signal using the Viterbi algorithm. In addition, the receiver comprises decoder circuitry configured to generate a digital output signal based on the soft information using soft decision forward error correction.

A receiver is equipped with an adaptive phase-offset controller and associated timing-calibration circuitry that together shift the timing for a data sampler and a digital equalizer. The sample and equalizer timing is shifted to a position with less residual inter-symbol interference (ISI) energy relative to the current symbol. The shifted position may be calculated using a measure of signal quality, such as a receiver bit-error rate or a comparison of filter-tap values, to optimize the timing of data recovery.

A receiver is equipped with an adaptive phase-offset controller and associated timing-calibration circuitry that together shift the timing for a data sampler and a digital equalizer. The sample and equalizer timing is shifted to a position with less residual inter-symbol interference (ISI) energy relative to the current symbol. The shifted position may be calculated using a measure of signal quality, such as a receiver bit-error rate or a comparison of filter-tap values, to optimize the timing of data recovery.

A receiver is equipped with an adaptive phase-offset controller and associated timing-calibration circuitry that together shift the timing for a data sampler and a digital equalizer. The sample and equalizer timing is shifted to a position with less residual inter-symbol interference (ISI) energy relative to the current symbol. The shifted position may be calculated using a measure of signal quality, such as a receiver bit-error rate or a comparison of filter-tap values, to optimize the timing of data recovery.

An advanced wireless communication system and method of use thereon is disclosed. The method comprises: selecting, according to first CSI provided by the plurality of UEs, one or more based UEs and one or more extended UEs; transmitting, from the advanced based station to extended UEs, a second configuration including configuration information elements for second CSI measurement and reporting assisting UEs pairing and HARQ retransmission; transmitting, from the advanced based station, a superposition modulated stream of data to the one or more based UEs and the one or more extended UEs, wherein the stream of data comprises a string of precoded symbols for the one or more based UEs and a string of precoded symbols for the one or more extended UEs, and wherein the precoded symbols for the one or more extended UEs are superposition modulated on the precoded symbols for the one or more based UEs.