A serial receiver combines continuous-time equalization, analog interleaving, and discrete-time gain for rapid, efficient data reception and quantization of a serial, continuous-time signal. A continuous-time equalizer equalizes a received signal. A number N of time-interleaved analog samplers sample the equalized continuous-time signal to provide N streams of analog samples transitioning at rate reduced by 1/N relative to the received signal. A set of N discrete-time variable-gain amplifiers amplify respective streams of analog samples. A quantizer then quantizes the amplified streams of analog samples to produce a digital signal.

A digital transmitter architecture is disclosed to transmit (TX) multi-gigabit per second data signals on single carriers (SC) or orthogonal frequency division multiplexing (OFDM) carriers at millimeter wave frequencies in either one of a high-resolution modulation mode or a spectral shaping mode. The architecture includes a number of digital power amplifier (DPA) and modulation reconfigurable circuit segments to process individual bits of a data bit stream in parallel according to a specific circuit configuration corresponding to the selected TX mode using a multiplexer to switch between configurations.

A method and apparatus of distortion compensation during data transmission uses an interweaved look-up table (ILUT) to mitigate residual signal distortions in a signal transmitted over a transmission link. The ILUT interweaves states across both an I and a Q tributary to calculate mean error and an extended symbol basis. As a result, the method works particularly well against two-dimensional distortions like nonlinearity, IQ-imbalance, and quadrature error. The method may be used for either pre-compensation when it is combined with k-means clustering in a transmitter or post-compensation when it is combined with maximum likelihood (ML) detection in a receiver.

A receiver device according to an embodiment includes a equalizer, a sampler, and a controller. The equalizer receive a first signal. The equalizer boosts the first signal to output a resultant as a second signal. The sampler samples the second signal. The sampler outputs a sampling result of the second signal as a first digital signal. The controller executes adaptive processing for adapting an amount of boost of the first signal. In the adaptive processing, the controller is configured to: adjust an amount of boost for the equalizer based on inter-symbol interference of a part in the first digital signal, the part matching a data pattern of a set pattern filter; and dynamically change a pattern filter to be set according to the amount of boost for the equalizer.

Described herein are technologies related to an implementation of a closed-loop system to measure and compensate non-linearity in a transceiver circuitry of a device.

Embodiments of a method and a system controlling an amplifier of a communications device are disclosed. In an embodiment, a method for controlling an amplifier of a communications device involves checking for a data reception at the communications device and freezing a gain of the amplifier if the data reception is detected.

A reception interface circuit includes a termination circuit, a buffer and an interface controller. The termination circuit is configured to change a termination mode in response to a termination control signal. The buffer is configured to change a reception characteristic in response to a buffer control signal. The interface controller is configured to generate the termination control signal and the buffer control signal such that the reception characteristic of the buffer is changed in association with the change in the termination mode. The reception interface circuit may support various communication standards by changing the reception characteristic of the buffer in association with the termination mode. Using the reception interface circuit, communication efficiency of transceiver systems such as a memory system and/or compatibility between a transmitter device and a receiver device may be improved.

A millimetre wave transceiver includes a multiplexer having a pair of transmit ports, receive ports and antenna ports, an antenna, an orthomode transducer, a pair of modulators each providing a transmit signal at the same frequency and receiving a carrier signal from a local oscillator and a data signal and modulating the carrier signal with the data signal to produce the transmit signal and providing its transmit signal to a corresponding transmit port of the multiplexer, a pair of demodulators each receiving a receive signal at the same frequency from a corresponding receive port and a reference signal from a local oscillator, and demodulating the receive signal at a frequency related to the reference signal to obtain a data signal, wherein at least one of the modulators are connected to a common local oscillator, and the demodulators are connected to a common local oscillator.

A serial receiver combines continuous-time equalization, analog interleaving, and discrete-time gain for rapid, efficient data reception and quantization of a serial, continuous-time signal. A continuous-time equalizer equalizes a received signal. A number N of time-interleaved analog samplers sample the equalized continuous-time signal to provide N streams of analog samples transitioning at rate reduced by 1/N relative to the received signal. A set of N discrete-time variable-gain amplifiers amplify respective streams of analog samples. A quantizer then quantizes the amplified streams of analog samples to produce a digital signal.

A filtering device includes a low-pass filter (LPF), a noise estimation circuit and a first combining circuit. The LPF receives and filters a pre-filtering signal to generate an output signal of the filtering device. The noise estimation circuit estimates an estimated noise signal according to the output signal and the pre-filtering signal. The first combining circuit subtracts the estimated noise signal from an input signal of the filtering device to generate the pre-filtering signal.