A method and apparatus for scrambling and descrambling data in a computer system includes transmitting non-scrambled data from a first high speed inter chip (IP) link circuit located on a first chip to a first serializer/deserializer (SERDES) physical (PHY) circuit located on the first chip, the first high speed link IP indicating the data is not scrambled. The received non-scrambled data is scrambled by the first SERDES PHY circuit and transmitted to a second chip. The received scrambled data is descrambled by a second SERDES PHY circuit located on the second chip. The non-scrambled data is transmitted by the second SERDES PHY circuit to a second high speed link IP circuit located on the second chip to a third circuit for further processing or transmission.

A method and apparatus of distortion compensation during data transmission uses an interweaved look-up table (ILUT) to mitigate residual signal distortions in a signal transmitted over a transmission link. The ILUT interweaves states across both an I and a Q tributary to calculate mean error and an extended symbol basis. As a result, the method works particularly well against two-dimensional distortions like nonlinearity, IQ-imbalance, and quadrature error. The method may be used for either pre-compensation when it is combined with k-means clustering in a transmitter or post-compensation when it is combined with maximum likelihood (ML) detection in a receiver.

A system and method for detecting a scrambling seed in communication between a drone and a controller are described. The system comprises a radio-frequency (RF) receiver configured to receive an RF signal transmitted between the drone and a controller. The RF signal includes scrambled data that contain repetitions of unscrambled data based on known scramblers with an unknown scrambling seed. The system further comprises a memory device in communication with a hardware processor and having stored computer-executable instructions to cause the hardware processor to identify the smallest number of bits required in each segment of scrambled data for data combining by finding an invertible predetermined matrix. The hardware processor is configured to determine the unknown scrambling seed based on a function combining the predetermined matrix, transition matrices of scramblers, and segments of received scrambled data.

Methods and apparatus for scrambling symbols over multi-lane serial interfaces in order to improve undesired electromagnetic emissions. In one embodiment the scrambling is based on a seed value associated with each lane. In a second embodiment, the scrambling values are selected from various taps of a scrambling component, where the selection is based on the associated lane. In still a third embodiment, each lane is associated with a distinct scrambling component.

An automobile includes an automotive lamp and an in-vehicle controller. A sensor generates image data. An encoder divides the image data into multiple data frames, and encodes the data frame thus divided. A scrambler scrambles the data frame thus encoded using a reproducible pseudo-random signal. A serializer converts the output of the scrambler into serial data. A transmitter transmits the serial data to the in-vehicle controller via a cable.

A system and method for detecting a scrambling seed in communication between a drone and a controller are described. The system comprises a radio-frequency (RF) receiver configured to receive an RF signal transmitted between the drone and a controller. The RF signal includes scrambled data that contain repetitions of unscrambled data based on known scramblers with an unknown scrambling seed. The system further comprises a memory device in communication with a hardware processor and having stored computer-executable instructions to cause the hardware processor to identify the smallest number of bits required in each segment of scrambled data for data combining by finding an invertible predetermined matrix. The hardware processor is configured to determine the unknown scrambling seed based on a function combining the predetermined matrix, transition matrices of scramblers, and segments of received scrambled data.

A system and method for detecting a scrambling seed in communication between a drone and a controller are described. The system comprises a radio-frequency (RF) receiver configured to receive an RF signal transmitted between the drone and a controller. The RF signal includes scrambled data that contain repetitions of unscrambled data based on known scramblers with an unknown scrambling seed. The system further comprises a memory device in communication with a hardware processor and having stored computer-executable instructions to cause the hardware processor to identify the smallest number of bits required in each segment of scrambled data for data combining by finding an invertible predetermined matrix. The hardware processor is configured to determine the unknown scrambling seed based on a function combining the predetermined matrix, transition matrices of scramblers, and segments of received scrambled data.

Methods, systems are provided for reconfiguring the position of a first tap in a descrambler circuit LFSR after the LFSR has been trained and synchronized with a corresponding scrambler circuit LFSR. A data path from the second tap position to the descrambler output by-passes logic elements located in the data path from the first tap to the descrambler output, thereby reducing delay in the descrambler circuit after the reconfiguration (i.e., the “lock-shift” operation). The tap position change may be communicated by a mode manager to a corresponding scrambler circuit, for applying a matching reconfiguration in the scrambler circuit, either directly via an I/O line or indirectly. The indirect route includes in-band transmissions between two ICs with two sets of self-synchronizing scrambler/descrambler pairs, and is based on monitored receiver LFSR output signals that indicate when a scrambler/descrambler pair is synchronized or whether the output of a descrambler circuit comprises descrambled data.

Methods, systems are provided for reconfiguring the position of a first tap in a descrambler circuit LFSR after the LFSR has been trained and synchronized with a corresponding scrambler circuit LFSR. A data path from the second tap position to the descrambler output by-passes logic elements located in the data path from the first tap to the descrambler output, thereby reducing delay in the descrambler circuit after the reconfiguration (i.e., the “lock-shift” operation). The tap position change may be communicated by a mode manager to a corresponding scrambler circuit, for applying a matching reconfiguration in the scrambler circuit, either directly via an I/O line or indirectly. The indirect route includes in-band transmissions between two ICs with two sets of self-synchronizing scrambler/descrambler pairs, and is based on monitored receiver LFSR output signals that indicate when a scrambler/descrambler pair is synchronized or whether the output of a descrambler circuit comprises descrambled data.

A method of processing a signal in a compressive sensing receiver, includes: obtaining a first signal received via an antenna; generating a first baseband signal by mixing the first signal with a second signal generated by a local oscillator based on a pseudo random binary sequence (PRBS); removing a spurious from the first baseband signal based on a pre-stored estimation value obtained by estimating the spurious generated by the local oscillator in advance; and detecting a spectral slice including the first signal based on the first baseband signal from which the spurious is removed and a measurement matrix.