Patent classifications
H04L25/24
Quadrature circuit interconnect architecture with clock forwarding
An integrated circuit communication architecture is provided and includes a clock lane, a clock divider, and a first de-skew circuit. The clock lane is configured to send a clock signal at a first rate from a first chip to a second chip. The clock divider is on the second chip and is configured to receive the clock signal sent via the clock lane and to create and send a first divided clock signal and a second divided clock signal from the received clock signal. The divided clock signals are sent at reduced rates compared to the first rate. The clock divider maintains current mode logic properties for the divided clock signals. The first de-skew circuit is configured to receive and process the divided clock signals to allow for sampling of data transmitted from the first chip to the second chip.
Mobile telecommunication repeater for canceling feedback signals
A mobile telecommunication wireless repeater includes: a combination stage for combining a received signal with a feedback cancellation signal; a comparison stage for comparing an input signal of the combination stage with an output signal of the combination stage and determining a weighted value and a time offset value for a feedback signal to be cancelled, based on the comparison; and a recombination stage comprising one or more adaptive filters and configured to receive the weighted value and the time offset value and generate the feedback cancellation signal according to the weighted value and the time offset value.
Control signal transmitting method and apparatus in relay station
A method of transmitting a control signal of a relay station is provided. The method includes: receiving a control signal and data from a base station in a first subframe; and transmitting an acknowledgement/negative acknowledgement (ACK/NACK) signal for the data to the base station in a second subframe, wherein a radio resource for transmitting the ACK/NACK signal is determined by a radio resource to which the control signal received in the first subframe is allocated and by a logical physical uplink control channel (PUCCH) index received by using a higher layer signal.
Control signal transmitting method and apparatus in relay station
A method of transmitting a control signal of a relay station is provided. The method includes: receiving a control signal and data from a base station in a first subframe; and transmitting an acknowledgement/negative acknowledgement (ACK/NACK) signal for the data to the base station in a second subframe, wherein a radio resource for transmitting the ACK/NACK signal is determined by a radio resource to which the control signal received in the first subframe is allocated and by a logical physical uplink control channel (PUCCH) index received by using a higher layer signal.
Dynamic pause period calculation for serial data transmission
A serial transmission peripheral device for transmitting serial transmission data with a variable data length includes a pulse forming unit; and a register programmable to set a desired transmission length. The peripheral device is operable to determine an actual transmission length and calculate a length of a pause pulse and to add the pause pulse at the end of a transmission to generate a transmission having a constant length.
System and techniques for repeating differential signals
Techniques and devices for differential signal repeating are described. A differential signal repeating method may include receiving an input differential signal pair including first and second input signals received at first and second input terminals, respectively, and generating an output signal at an output terminal. Generating the output signal may include: based on a determination, at a first time, that the first and second input signals represent complementary values, setting a level of the output signal to represent an inverse of the value represented by the first input signal, and based on a determination, at a second time, that the first and second input signals do not represent complementary values, placing the output terminal in a high-impedance state.
Network element clock synchronization systems and methods using optical transport network delay measurement
The present disclosure provides Network Element (NE) clock synchronization using Optical Transport Network (OTN) delay measurement systems and methods such as described in ITU-T G.709 (December 2009) Interfaces for the Optical Transport Network (OTN) and G.798 (October 2010) Characteristics of optical transport network hierarchy equipment functional blocks. OTN provides a Delay Measurement (DM) function to measure fiber path latency between two network elements to within microsecond accuracy. The convergence of packet switching and OTN transport into the same network element allows the sharing of this information between the two applications. The OTN delay measurement value can be used to synchronize two network element clocks to within microsecond accuracy without the need for a costly GPS synchronization solution or reduced accuracy NTP solutions.
Retimer with slicer level adjustment
In described examples, a retimer includes a reference voltage generator, first, second, third, and fourth comparators, a hit sensor, a window results comparison circuit, and a window control circuit. First inputs of the first, second, third, and fourth comparators receive samples of a data stream. First, second, third, and fourth outputs of the reference voltage generator are coupled to respective second inputs of the first, second, third, and fourth comparators. The third and fourth comparators output to, respectively, first and second inputs of the hit sensor. The hit sensor outputs to an input of the window results comparison circuit. The window results comparison circuit outputs to an input of the window control circuit. The window control circuit outputs to an input of the reference voltage generator.