A system includes a transmitter to transmit a set of bits associated with signaling having one or more levels. The system includes a receiver coupled to the transmitter, the receiver to receive the set of bits and generate a first plurality of digital values, each digital value generated at a first timing value and a plurality of reference voltages, the reference voltage incremented based at least in part on generating a digital value of the first plurality of digital values. The receiver is to generate a second plurality of digital values at a second timing value and the plurality of reference voltages, the first timing value incremented to the second timing value based at least in part on generating the first plurality of digital values. The system includes a controller to determine an amplitude associated with each the first and second plurality of digital values.

The guard-space reference disclosed herein is a signal transmitted in the guard spaces separating message data intervals, and configured to reveal amplitude noise or phase noise or both, using 5G or 6G technology. For example, the transmitter can transmit an I-branch with a predetermined amplitude level, and an orthogonal Q branch with zero amplitude, in the guard space. The receiver can measure the received amplitude and phase of the guard-space reference, subtract the initial amplitude and phase, and thereby measure both phase noise and amplitude noise. The receiver can then subtract the measured amplitude and phase effects from the message data, thereby negating both phase noise and amplitude noise. Guard-space references disclosed herein can preserve the inter-subcarrier orthogonality, inter-symbol separation, and signal circularity advantages of prior art, while additionally providing both amplitude noise and phase noise mitigation. Examples are suitable for wireless standards.

The guard-space reference disclosed herein is a signal transmitted in the guard spaces separating message data intervals, and configured to reveal amplitude noise or phase noise or both, using 5G or 6G technology. For example, the transmitter can transmit an I-branch with a predetermined amplitude level, and an orthogonal Q branch with zero amplitude, in the guard space. The receiver can measure the received amplitude and phase of the guard-space reference, subtract the initial amplitude and phase, and thereby measure both phase noise and amplitude noise. The receiver can then subtract the measured amplitude and phase effects from the message data, thereby negating both phase noise and amplitude noise. Guard-space references disclosed herein can preserve the inter-subcarrier orthogonality, inter-symbol separation, and signal circularity advantages of prior art, while additionally providing both amplitude noise and phase noise mitigation. Examples are suitable for wireless standards.

A driver circuit of a PAM-N transmitting device transmits a PAM-N signal via a communication channel, wherein N is greater than 2, and the PAM-N signal has N signal levels corresponding to N symbols. A PAM-N receiving device receives the PAM-N signal. The PAM-N receiving device generates distortion information indicative of a level of distortion corresponding to inequalities in voltage differences between the N signal levels. The PAM-N receiving device transmits to the PAM-N transmitting device the distortion information indicative of the level of the distortion. The PAM-N transmitting device receives the distortion information. The PAM-N transmitting device adjusts one or more drive strength parameters of the driver circuit of the PAM-N transmitting device based on the distortion information.

A driver circuit of a PAM-N transmitting device transmits a PAM-N signal via a communication channel, wherein N is greater than 2, and the PAM-N signal has N signal levels corresponding to N symbols. A PAM-N receiving device receives the PAM-N signal. The PAM-N receiving device generates distortion information indicative of a level of distortion corresponding to inequalities in voltage differences between the N signal levels. The PAM-N receiving device transmits to the PAM-N transmitting device the distortion information indicative of the level of the distortion. The PAM-N transmitting device receives the distortion information. The PAM-N transmitting device adjusts one or more drive strength parameters of the driver circuit of the PAM-N transmitting device based on the distortion information.

A signal transmitter circuit includes an output driver circuit configured to transmit a signal using a multi-level pulse amplitude modulation (PAM) scheme comprising a plurality of discreet signal levels. During operation, the output driver initiates a first transition of the signal to a first level of the multi-level PAM scheme from a second level of the multi-level PAM scheme, and initiates a second transition of the signal to the first level from a third level of the multi-level PAM scheme. The signal transmitter further includes a control circuit configured to control a slew rate of the signal transmitter circuit to cause the signal to reach a threshold voltage level at a first time, the first time occurring a first duration of time after the first transition is initiated, and to cause the signal to reach the threshold voltage level at a second time, the second time occurring the first duration of time after the second transition is initiated.

A signal transmitter circuit includes an output driver circuit configured to transmit a signal using a multi-level pulse amplitude modulation (PAM) scheme comprising a plurality of discreet signal levels. During operation, the output driver initiates a first transition of the signal to a first level of the multi-level PAM scheme from a second level of the multi-level PAM scheme, and initiates a second transition of the signal to the first level from a third level of the multi-level PAM scheme. The signal transmitter further includes a control circuit configured to control a slew rate of the signal transmitter circuit to cause the signal to reach a threshold voltage level at a first time, the first time occurring a first duration of time after the first transition is initiated, and to cause the signal to reach the threshold voltage level at a second time, the second time occurring the first duration of time after the second transition is initiated.

A dither amplitude circuit has a current circuit for receiving DC voltage signals and generating a direct current on a basis thereof, and generating a dither signal, and a dither current on the basis thereof, applying the dither current to the direct current in order to obtain a drive current, artificially modulating the amplitude of the dither signal or a directly modulated drive current with an amplitude modulation deviation on a periodic basis such that a quantization threshold is reliably exceeded. The dither amplitude circuit also has a return current detection circuit that generates numerous quantized digital values in a time period on a basis of the drive current flowing through a load, such that the dither amplitude can be determined from the numerous digital values.

A dither amplitude circuit has a current circuit for receiving DC voltage signals and generating a direct current on a basis thereof, and generating a dither signal, and a dither current on the basis thereof, applying the dither current to the direct current in order to obtain a drive current, artificially modulating the amplitude of the dither signal or a directly modulated drive current with an amplitude modulation deviation on a periodic basis such that a quantization threshold is reliably exceeded. The dither amplitude circuit also has a return current detection circuit that generates numerous quantized digital values in a time period on a basis of the drive current flowing through a load, such that the dither amplitude can be determined from the numerous digital values.

A system includes a transmitter to transmit a set of bits associated with signaling having one or more levels. The system includes a receiver coupled to the transmitter, the receiver to receive the set of bits and generate a first plurality of digital values, each digital value generated at a first timing value and a plurality of reference voltages, the reference voltage incremented based at least in part on generating a digital value of the first plurality of digital values. The receiver is to generate a second plurality of digital values at a second timing value and the plurality of reference voltages, the first timing value incremented to the second timing value based at least in part on generating the first plurality of digital values. The system includes a controller to determine an amplitude associated with each the first and second plurality of digital values.